bcureg.h Source File
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Go to the documentation of this file. 49 #define BCUCNT1_REG_W 0x000 51 #define BCUCNT1_ROMMASK (1<<15) 52 #define BCUCNT1_ROM64M (1<<15) 53 #define BCUCNT1_ROM32M (0<<15) 55 #define BCUCNT1_DRAMMASK (1<<14) 56 #define BCUCNT1_DRAM64M (1<<14) 57 #define BCUCNT1_DRAM32M (0<<14) 59 #define BCUCNT1_ROMSMASK (0x3<<14) 60 #define BCUCNT1_ROMS64M (0x2<<14) 61 #define BCUCNT1_ROMS32M (0x1<<14) 63 #define BCUCNT1_ISAMLCD (1<<13) 64 #define BCUCNT1_ISA (1<<13) 65 #define BCUCNT1_LCD (0<<13) 67 #define BCUCNT1_PAGEMASK (1<<12) 68 #define BCUCNT1_PAGE128 (1<<12) 69 #define BCUCNT1_PAGE64 (0<<12) 71 #define BCUCNT1_PAGESIZEMASK (3<<12) 72 #define BCUCNT1_PASESIZE32 (2<<12) 73 #define BCUCNT1_PASESIZE16 (1<<12) 74 #define BCUCNT1_PASESIZE8 (0<<12) 76 #define BCUCNT1_PAGE2MASK (1<<10) 77 #define BCUCNT1_PAGE2PAGE (1<<10) 78 #define BCUCNT1_PAGE2ORD (0<<10) 80 #define BCUCNT1_PAGE0MASK (1<<8) 81 #define BCUCNT1_PAGE0PAGE (1<<8) 82 #define BCUCNT1_PAGE0ORD (0<<8) 84 #define BCUCNT1_REFMASK (1<<7) 85 #define BCUCNT1_REF1024 (1<<7) 86 #define BCUCNT1_REF4096 (0<<7) 88 #define BCUCNT1_ROMWEN2 (1<<6) 89 #define BCUCNT1_ROMWEN2EN (1<<6) 90 #define BCUCNT1_ROMWEN2DS (0<<6) 92 #define BCUCNT1_PAGEROM (1<<6) 93 #define BCUCNT1_PAGEROMEN (1<<6) 94 #define BCUCNT1_PAGEROMDIS (0<<6) 96 #define BCUCNT1_ROMWEN (1<<5) 97 #define BCUCNT1_ROMWENEN (1<<5) 98 #define BCUCNT1_ROMWENDS (0<<5) 100 #define BCUCNT1_ROMWEN0 (1<<4) 101 #define BCUCNT1_ROMWEN0EN (1<<4) 102 #define BCUCNT1_ROMWEN0DS (0<<4) 104 #define BCUCNT1_SRFSTAT (1<<4) 105 #define BCUCNT1_SRFSTATSRF (1<<4) 106 #define BCUCNT1_SRFSTATCBR (0<<4) 108 #define BCUCNT1_BCPUR (1<<3) 109 #define BCUCNT1_BCPUREN (1<<3) 110 #define BCUCNT1_BCPURDIS (0<<3) 112 #define BCUCNT1_HLD (1<<2) 113 #define BCUCNT1_HLDEN (1<<2) 114 #define BCUCNT1_HLDDIS (1<<2) 116 #define BCUCNT1_BUSHERR (1<<1) 118 #define BCUCNT1_BUSHERREN (1<<1) 119 #define BCUCNT1_BUSHERRDS (0<<1) 121 #define BCUCNT1_RTYPE (0x3<<1) 122 #define BCUCNT1_RTOROM (0<<1) 123 #define BCUCNT1_RTFLASH (1<<1) 124 #define BCUCNT1_RTPAGEROM (2<<1) 126 #define BCUCNT1_RSTOUT (1) 127 #define BCUCNT1_RSTOUTH (1) 128 #define BCUCNT1_RSTOUTL (0) 131 #define BCUCNT2_REG_W 0x002 133 #define BCUCNT2_GMODE (1) 134 #define BCUCNT2_GMODENOM (1) 135 #define BCUCNT2_GMODEINV (0) 137 #define BCUBR_REG_W 0x002 139 #define BCUROMSIZE_REG_W 0x004 140 #define BCUROMSIZE_SIZE3 (7<<12) 141 #define BCUROMSIZE_SIZE3_64 (5<<12) 142 #define BCUROMSIZE_SIZE3_32 (4<<12) 143 #define BCUROMSIZE_SIZE3_16 (3<<12) 144 #define BCUROMSIZE_SIZE3_8 (2<<12) 145 #define BCUROMSIZE_SIZE3_4 (1<<12) 147 #define BCUROMSIZE_SIZE2 (7<<8) 148 #define BCUROMSIZE_SIZE2_64 (5<<8) 149 #define BCUROMSIZE_SIZE2_32 (4<<8) 150 #define BCUROMSIZE_SIZE2_16 (3<<8) 151 #define BCUROMSIZE_SIZE2_8 (2<<8) 152 #define BCUROMSIZE_SIZE2_4 (1<<8) 154 #define BCUROMSIZE_SIZE1 (7<<4) 155 #define BCUROMSIZE_SIZE1_64 (5<<4) 156 #define BCUROMSIZE_SIZE1_32 (4<<4) 157 #define BCUROMSIZE_SIZE1_16 (3<<4) 158 #define BCUROMSIZE_SIZE1_8 (2<<4) 159 #define BCUROMSIZE_SIZE1_4 (1<<4) 161 #define BCUROMSIZE_SIZE0 (7) 162 #define BCUROMSIZE_SIZE0_64 (5) 163 #define BCUROMSIZE_SIZE0_32 (4) 164 #define BCUROMSIZE_SIZE0_16 (3) 165 #define BCUROMSIZE_SIZE0_8 (2) 166 #define BCUROMSIZE_SIZE0_4 (1) 168 #define BCUBRCNT_REG_W 0x004 170 #define BCUROMSPEED_REG_W 0x006 171 #define BCUROMSPEED_PATIME (0x3<<12) 172 #define BCUROMSPEED_PATIME_5VT (0x3<<12) 173 #define BCUROMSPEED_PATIME_4VT (0x2<<12) 174 #define BCUROMSPEED_PATIME_3VT (0x1<<12) 175 #define BCUROMSPEED_PATIME_2VT (0x0<<12) 177 #define BCUROMSPEED_ATIME (0xf) 178 #define BCUROMSPEED_ATIME_18VT (0xf) 179 #define BCUROMSPEED_ATIME_17VT (0xe) 180 #define BCUROMSPEED_ATIME_16VT (0xd) 181 #define BCUROMSPEED_ATIME_15VT (0xc) 182 #define BCUROMSPEED_ATIME_14VT (0xb) 183 #define BCUROMSPEED_ATIME_13VT (0xa) 184 #define BCUROMSPEED_ATIME_12VT (0x9) 185 #define BCUROMSPEED_ATIME_11VT (0x8) 186 #define BCUROMSPEED_ATIME_10VT (0x7) 187 #define BCUROMSPEED_ATIME_9VT (0x6) 188 #define BCUROMSPEED_ATIME_8VT (0x5) 189 #define BCUROMSPEED_ATIME_7VT (0x4) 190 #define BCUROMSPEED_ATIME_6VT (0x3) 191 #define BCUROMSPEED_ATIME_5VT (0x2) 192 #define BCUROMSPEED_ATIME_4VT (0x1) 193 #define BCUROMSPEED_ATIME_3VT (0x0) 195 #define BCUBCL_REG_W 0x006 197 #define BCUIO0SPEED_REG_W 0x008 198 #define BCUIO0SPEED_RWCS (0x3<<12) 199 #define BCUIO0SPEED_RWCS_5VT (0x3<<12) 200 #define BCUIO0SPEED_RWCS_4VT (0x2<<12) 201 #define BCUIO0SPEED_RWCS_3VT (0x1<<12) 202 #define BCUIO0SPEED_RWCS_2VT (0x0<<12) 204 #define BCUIO0SPEED_RDYRW (0xf<<8) 205 #define BCUIO0SPEED_RDYRW_18VT (0xf) 206 #define BCUIO0SPEED_RDYRW_17VT (0xe) 207 #define BCUIO0SPEED_RDYRW_16VT (0xd) 208 #define BCUIO0SPEED_RDYRW_15VT (0xc) 209 #define BCUIO0SPEED_RDYRW_14VT (0xb) 210 #define BCUIO0SPEED_RDYRW_13VT (0xa) 211 #define BCUIO0SPEED_RDYRW_12VT (0x9) 212 #define BCUIO0SPEED_RDYRW_11VT (0x8) 213 #define BCUIO0SPEED_RDYRW_10VT (0x7) 214 #define BCUIO0SPEED_RDYRW_9VT (0x6) 215 #define BCUIO0SPEED_RDYRW_8VT (0x5) 216 #define BCUIO0SPEED_RDYRW_7VT (0x4) 217 #define BCUIO0SPEED_RDYRW_6VT (0x3) 218 #define BCUIO0SPEED_RDYRW_5VT (0x2) 219 #define BCUIO0SPEED_RDYRW_4VT (0x1) 220 #define BCUIO0SPEED_RDYRW_3VT (0x0) 222 #define BCUIO0SPEED_RWRDY (0xf<<4) 223 #define BCUIO0SPEED_RWRDY_14VT (0xf) 224 #define BCUIO0SPEED_RWRDY_13VT (0xe) 225 #define BCUIO0SPEED_RWRDY_12VT (0xd) 226 #define BCUIO0SPEED_RWRDY_11VT (0xc) 227 #define BCUIO0SPEED_RWRDY_10VT (0xb) 228 #define BCUIO0SPEED_RWRDY_9VT (0xa) 229 #define BCUIO0SPEED_RWRDY_8VT (0x9) 230 #define BCUIO0SPEED_RWRDY_7VT (0x8) 231 #define BCUIO0SPEED_RWRDY_6VT (0x7) 232 #define BCUIO0SPEED_RWRDY_5VT (0x6) 233 #define BCUIO0SPEED_RWRDY_4VT (0x5) 234 #define BCUIO0SPEED_RWRDY_3VT (0x4) 235 #define BCUIO0SPEED_RWRDY_2VT (0x3) 236 #define BCUIO0SPEED_RWRDY_1VT (0x2) 237 #define BCUIO0SPEED_RWRDY_0VT (0x1) 238 #define BCUIO0SPEED_RWRDY_M1VT (0x0) 240 #define BCUIO0SPEED_CSRW (0xf<<0) 241 #define BCUIO0SPEED_CSRW_16VT (0xf) 242 #define BCUIO0SPEED_CSRW_15VT (0xe) 243 #define BCUIO0SPEED_CSRW_14VT (0xd) 244 #define BCUIO0SPEED_CSRW_13VT (0xc) 245 #define BCUIO0SPEED_CSRW_12VT (0xb) 246 #define BCUIO0SPEED_CSRW_11VT (0xa) 247 #define BCUIO0SPEED_CSRW_10VT (0x9) 248 #define BCUIO0SPEED_CSRW_9VT (0x8) 249 #define BCUIO0SPEED_CSRW_8VT (0x7) 250 #define BCUIO0SPEED_CSRW_7VT (0x6) 251 #define BCUIO0SPEED_CSRW_6VT (0x5) 252 #define BCUIO0SPEED_CSRW_5VT (0x4) 253 #define BCUIO0SPEED_CSRW_4VT (0x3) 254 #define BCUIO0SPEED_CSRW_3VT (0x2) 255 #define BCUIO0SPEED_CSRW_2VT (0x1) 256 #define BCUIO0SPEED_CSRW_1VT (0x0) 258 #define BCUBCLCNT_REG_W 0x008 260 #define BCUIO1SPEED_REG_W 0x00A 261 #define BCUIO1SPEED_RWCS (0x3<<12) 262 #define BCUIO1SPEED_RWCS_5VT (0x3<<12) 263 #define BCUIO1SPEED_RWCS_4VT (0x2<<12) 264 #define BCUIO1SPEED_RWCS_3VT (0x1<<12) 265 #define BCUIO1SPEED_RWCS_2VT (0x0<<12) 267 #define BCUIO1SPEED_RDYRW (0xf<<8) 268 #define BCUIO1SPEED_RDYRW_18VT (0xf) 269 #define BCUIO1SPEED_RDYRW_17VT (0xe) 270 #define BCUIO1SPEED_RDYRW_16VT (0xd) 271 #define BCUIO1SPEED_RDYRW_15VT (0xc) 272 #define BCUIO1SPEED_RDYRW_14VT (0xb) 273 #define BCUIO1SPEED_RDYRW_13VT (0xa) 274 #define BCUIO1SPEED_RDYRW_12VT (0x9) 275 #define BCUIO1SPEED_RDYRW_11VT (0x8) 276 #define BCUIO1SPEED_RDYRW_10VT (0x7) 277 #define BCUIO1SPEED_RDYRW_9VT (0x6) 278 #define BCUIO1SPEED_RDYRW_8VT (0x5) 279 #define BCUIO1SPEED_RDYRW_7VT (0x4) 280 #define BCUIO1SPEED_RDYRW_6VT (0x3) 281 #define BCUIO1SPEED_RDYRW_5VT (0x2) 282 #define BCUIO1SPEED_RDYRW_4VT (0x1) 283 #define BCUIO1SPEED_RDYRW_3VT (0x0) 285 #define BCUIO1SPEED_RWRDY (0xf<<4) 286 #define BCUIO1SPEED_RWRDY_14VT (0xf) 287 #define BCUIO1SPEED_RWRDY_13VT (0xe) 288 #define BCUIO1SPEED_RWRDY_12VT (0xd) 289 #define BCUIO1SPEED_RWRDY_11VT (0xc) 290 #define BCUIO1SPEED_RWRDY_10VT (0xb) 291 #define BCUIO1SPEED_RWRDY_9VT (0xa) 292 #define BCUIO1SPEED_RWRDY_8VT (0x9) 293 #define BCUIO1SPEED_RWRDY_7VT (0x8) 294 #define BCUIO1SPEED_RWRDY_6VT (0x7) 295 #define BCUIO1SPEED_RWRDY_5VT (0x6) 296 #define BCUIO1SPEED_RWRDY_4VT (0x5) 297 #define BCUIO1SPEED_RWRDY_3VT (0x4) 298 #define BCUIO1SPEED_RWRDY_2VT (0x3) 299 #define BCUIO1SPEED_RWRDY_1VT (0x2) 300 #define BCUIO1SPEED_RWRDY_0VT (0x1) 301 #define BCUIO1SPEED_RWRDY_M1VT (0x0) 303 #define BCUIO1SPEED_CSRW (0xf<<0) 304 #define BCUIO1SPEED_CSRW_16VT (0xf) 305 #define BCUIO1SPEED_CSRW_15VT (0xe) 306 #define BCUIO1SPEED_CSRW_14VT (0xd) 307 #define BCUIO1SPEED_CSRW_13VT (0xc) 308 #define BCUIO1SPEED_CSRW_12VT (0xb) 309 #define BCUIO1SPEED_CSRW_11VT (0xa) 310 #define BCUIO1SPEED_CSRW_10VT (0x9) 311 #define BCUIO1SPEED_CSRW_9VT (0x8) 312 #define BCUIO1SPEED_CSRW_8VT (0x7) 313 #define BCUIO1SPEED_CSRW_7VT (0x6) 314 #define BCUIO1SPEED_CSRW_6VT (0x5) 315 #define BCUIO1SPEED_CSRW_5VT (0x4) 316 #define BCUIO1SPEED_CSRW_4VT (0x3) 317 #define BCUIO1SPEED_CSRW_3VT (0x2) 318 #define BCUIO1SPEED_CSRW_2VT (0x1) 319 #define BCUIO1SPEED_CSRW_1VT (0x0) 321 #define BCUSPEED_REG_W 0x00A 323 #define BCUSPD_WPROM (0x3<<12) 324 #define BCUSPD_WPROMRFU (0x3<<12) 325 #define BCUSPD_WPROM1T (0x2<<12) 326 #define BCUSPD_WPROM2T (0x1<<12) 327 #define BCUSPD_WPROM3T (0x0<<12) 329 #define BCUSPD_WLCDM (0x7<<8) 332 #define BCUSPD_WLCDRFU (0x7<<8) 333 #define BCUSPD_WLCDRFU1 (0x6<<8) 334 #define BCUSPD_WLCDRFU2 (0x5<<8) 335 #define BCUSPD_WLCDRFU3 (0x4<<8) 336 #define BCUSPD_WLCD2T (0x3<<8) 337 #define BCUSPD_WLCD4T (0x2<<8) 338 #define BCUSPD_WLCD6T (0x1<<8) 339 #define BCUSPD_WLCD8T (0x0<<8) 341 #define BCUSPD_ISAM1T (0x7<<8) 342 #define BCUSPD_ISAM2T (0x6<<8) 343 #define BCUSPD_ISAM3T (0x5<<8) 344 #define BCUSPD_ISAM4T (0x4<<8) 345 #define BCUSPD_ISAM5T (0x3<<8) 346 #define BCUSPD_ISAM6T (0x2<<8) 347 #define BCUSPD_ISAM7T (0x1<<8) 348 #define BCUSPD_ISAM8T (0x0<<8) 350 #define BCUSPD_WISAA (0x7<<4) 351 #define BCUSPD_WISAA3T (0x5<<4) 352 #define BCUSPD_WISAA4T (0x4<<4) 353 #define BCUSPD_WISAA5T (0x3<<4) 354 #define BCUSPD_WISAA6T (0x2<<4) 355 #define BCUSPD_WISAA7T (0x1<<4) 356 #define BCUSPD_WISAA8T (0x0<<4) 358 #define BCUSPD_WROMA (0x7<<0) 359 #define BCUSPD_WROMA2T (0x7<<0) 360 #define BCUSPD_WROMA3T (0x6<<0) 361 #define BCUSPD_WROMA4T (0x5<<0) 362 #define BCUSPD_WROMA5T (0x4<<0) 363 #define BCUSPD_WROMA6T (0x3<<0) 364 #define BCUSPD_WROMA7T (0x2<<0) 365 #define BCUSPD_WROMA8T (0x1<<0) 366 #define BCUSPD_WROMA9T (0x0<<0) 369 #define BCUERRST_REG_W 0x00C 371 #define BCUERRST_BUSERRMASK (1) 372 #define BCUERRST_BUSERR (1) 373 #define BCUERRST_BUSNORM (0) 375 #define BCU81SPEED_REG_W 0x00C 377 #define BCU81SPD_WPROM (0x7<<12) 378 #define BCU81SPD_WPROM8T (0x7<<12) 379 #define BCU81SPD_WPROM7T (0x6<<12) 380 #define BCU81SPD_WPROM6T (0x5<<12) 381 #define BCU81SPD_WPROM5T (0x4<<12) 382 #define BCU81SPD_WPROM4T (0x3<<12) 383 #define BCU81SPD_WPROM3T (0x2<<12) 384 #define BCU81SPD_WPROM2T (0x1<<12) 385 #define BCU81SPD_WPROM1T (0x0<<12) 387 #define BCU81SPD_WROMA (0xf<<0) 388 #define BCU81SPD_WROMA16T (0xf<<0) 389 #define BCU81SPD_WROMA15T (0xe<<0) 390 #define BCU81SPD_WROMA14T (0xd<<0) 391 #define BCU81SPD_WROMA13T (0xc<<0) 392 #define BCU81SPD_WROMA12T (0xb<<0) 393 #define BCU81SPD_WROMA11T (0xa<<0) 394 #define BCU81SPD_WROMA10T (0x9<<0) 395 #define BCU81SPD_WROMA9T (0x8<<0) 396 #define BCU81SPD_WROMA8T (0x7<<0) 397 #define BCU81SPD_WROMA7T (0x6<<0) 398 #define BCU81SPD_WROMA6T (0x5<<0) 399 #define BCU81SPD_WROMA5T (0x4<<0) 400 #define BCU81SPD_WROMA4T (0x3<<0) 401 #define BCU81SPD_WROMA3T (0x2<<0) 402 #define BCU81SPD_WROMA2T (0x1<<0) 403 #define BCU81SPD_WROMA1T (0x0<<0) 405 #define BCURFCNT_REG_W 0x00E 406 #define BCU81RFCNT_REG_W 0x010 408 #define BCURFCNT_MASK 0x3fff 410 #define BCUREVID_REG_W 0x010 411 #define BCU81REVID_REG_W 0x014 413 #define BCUREVID_RIDMASK (0xf<<12) 414 #define BCUREVID_RIDSHFT (12) 415 #define BCUREVID_RID_4131 (0x5) 416 #define BCUREVID_RID_4122 (0x4) 417 #define BCUREVID_RID_4121 (0x3) 418 #define BCUREVID_RID_4111 (0x2) 419 #define BCUREVID_RID_4102 (0x1) 420 #define BCUREVID_RID_4101 (0x0) 421 #define BCUREVID_RID_4181 (0x0) 422 #define BCUREVID_FIXRID_OFF (0x10) 423 #define BCUREVID_FIXRID_4181 (0x10) 425 #define BCUREVID_MJREVMASK (0xf<<8) 426 #define BCUREVID_MJREVSHFT (8) 428 #define BCUREVID_MNREVMASK (0xf) 429 #define BCUREVID_MNREVSHFT (0) 432 #define BCUREFCOUNT_REG_W 0x012 434 #define BCUREFCOUNT_MASK 0x3fff 437 #define BCUCLKSPEED_REG_W 0x014 438 #define BCU81CLKSPEED_REG_W 0x018 440 #define BCUCLKSPEED_DIVT2B (1<<15) 441 #define BCUCLKSPEED_DIVT3B (1<<14) 442 #define BCUCLKSPEED_DIVT4B (1<<13) 444 #define BCUCLKSPEED_DIVTMASK (0xf<<12) 445 #define BCUCLKSPEED_DIVT3 0x3 446 #define BCUCLKSPEED_DIVT4 0x4 447 #define BCUCLKSPEED_DIVT5 0x5 448 #define BCUCLKSPEED_DIVT6 0x6 449 #define BCUCLKSPEED_DIVTSHFT (12) 451 #define BCUCLKSPEED_TDIVMODE (0x1<<12) 452 #define BCUCLKSPEED_TDIV4 0x1 453 #define BCUCLKSPEED_TDIV2 0x0 454 #define BCUCLKSPEED_TDIVSHFT (12) 456 #define BCU81CLKSPEED_DIVTMASK (0x7<<12) 457 #define BCU81CLKSPEED_DIVT1 0x7 458 #define BCU81CLKSPEED_DIVT2 0x3 459 #define BCU81CLKSPEED_DIVT3 0x5 460 #define BCU81CLKSPEED_DIVT4 0x6 461 #define BCU81CLKSPEED_DIVTSHFT (12) 463 #define BCUCLKSPEED_DIVVTMASK (0xf<<8) 464 #define BCUCLKSPEED_DIVVT1 0x1 465 #define BCUCLKSPEED_DIVVT2 0x2 466 #define BCUCLKSPEED_DIVVT3 0x3 467 #define BCUCLKSPEED_DIVVT4 0x4 468 #define BCUCLKSPEED_DIVVT5 0x5 469 #define BCUCLKSPEED_DIVVT6 0x6 470 #define BCUCLKSPEED_DIVVT1_5 0x9 471 #define BCUCLKSPEED_DIVVT2_5 0xa 472 #define BCUCLKSPEED_DIVVTSHFT (8) 474 #define BCUCLKSPEED_VTDIVMODE (0x7<<8) 475 #define BCUCLKSPEED_VTDIV6 0x6 476 #define BCUCLKSPEED_VTDIVT5 0x5 477 #define BCUCLKSPEED_VTDIVT4 0x4 478 #define BCUCLKSPEED_VTDIVT3 0x3 479 #define BCUCLKSPEED_VTDIVT2 0x2 480 #define BCUCLKSPEED_VTDIVT1 0x1 481 #define BCUCLKSPEED_VTDIVSHFT (8) 483 #define BCUCLKSPEED_CLKSPMASK (0x1f) 484 #define BCUCLKSPEED_CLKSPSHFT (0) 486 #define BCUCNT3_REG_W 0x016 488 #define BCUCNT3_EXTROMMASK (1<<15) 489 #define BCUCNT3_EXTROM64M (1<<15) 490 #define BCUCNT3_EXTROM32M (0<<15) 492 #define BCUCNT3_EXTDRAMMASK (1<<14) 493 #define BCUCNT3_EXTDRAM64M (1<<14) 494 #define BCUCNT3_EXTDRAM16M (0<<14) 496 #define BCUCNT3_EXTROMCS (0x3<<12) 497 #define BCUCNT3_ROMROM (0x3<<12) 498 #define BCUCNT3_ROMRAM (0x2<<12) 499 #define BCUCNT3_RAMRAM (0x0<<12) 501 #define BCUCNT3_EXTMEM (1<<11) 502 #define BCUCNT3_EXTMEMEN (1<<11) 503 #define BCUCNT3_EXTMEMDS (0<<11) 505 #define BCUCNT3_LCDSIZE (1<<7) 506 #define BCUCNT3_LCD32 (1<<7) 507 #define BCUCNT3_LCD16 (0<<7) 509 #define BCUCNT3_SYSDIREN (1<<3) 510 #define BCUCNT3_SYSDIR (1<<3) 511 #define BCUCNT3_GPIO6 (0<<3) 513 #define BCUCNT3_LCDSEL1 (1<<1) 514 #define BCUCNT3_LCDSEL1_NOBUF (1<<1) 515 #define BCUCNT3_LCDSEL1_BUF (0<<1) 517 #define BCUCNT3_LCDSEL0 (1<<1) 518 #define BCUCNT3_LCDSEL0_NOBUF (1<<1) 519 #define BCUCNT3_LCDSEL0_BUF (0<<1)
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