RAMComponent.cc Source File

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RAMComponent.cc
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1 /*
2  * Copyright (C) 2008-2010 Anders Gavare. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * 1. Redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution.
12  * 3. The name of the author may not be used to endorse or promote products
13  * derived from this software without specific prior written permission.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <iomanip>
29 #include <assert.h>
30 #include <sys/mman.h>
31 
33 #include "GXemul.h"
34 
35 
36 RAMComponent::RAMComponent(const string& visibleClassName)
37  : MemoryMappedComponent("ram", visibleClassName)
38  , m_blockSizeShift(22) // 22 = 4 MB per block
39  , m_blockSize(1 << m_blockSizeShift)
40  , m_dataHandler(*this)
41  , m_writeProtected(false)
42  , m_lastDumpAddr(0)
43  , m_addressSelect(0)
44  , m_selectedHostMemoryBlock(NULL)
45  , m_selectedOffsetWithinBlock(0)
46 {
47  AddVariable("writeProtect", &m_writeProtected);
48  AddVariable("lastDumpAddr", &m_lastDumpAddr);
49  AddCustomVariable("data", &m_dataHandler);
50 }
51 
52 
54 {
55  ReleaseAllBlocks();
56 }
57 
58 
59 void RAMComponent::ReleaseAllBlocks()
60 {
61  for (size_t i=0; i<m_memoryBlocks.size(); ++i) {
62  if (m_memoryBlocks[i] != NULL) {
63  munmap(m_memoryBlocks[i], m_blockSize);
64  m_memoryBlocks[i] = NULL;
65  }
66  }
67 }
68 
69 
71 {
72  return new RAMComponent();
73 }
74 
75 
76 string RAMComponent::GetAttribute(const string& attributeName)
77 {
78  if (attributeName == "stable")
79  return "yes";
80 
81  if (attributeName == "description")
82  return "A generic RAM component.";
83 
84  return MemoryMappedComponent::GetAttribute(attributeName);
85 }
86 
87 
89 {
90  ReleaseAllBlocks();
91 }
92 
93 
94 void RAMComponent::GetMethodNames(vector<string>& names) const
95 {
96  // Add our method names...
97  names.push_back("dump");
98 
99  // ... and make sure to call the base class implementation:
101 }
102 
103 
104 bool RAMComponent::MethodMayBeReexecutedWithoutArgs(const string& methodName) const
105 {
106  if (methodName == "dump")
107  return true;
108 
109  // ... and make sure to call the base class implementation:
111 }
112 
113 
114 void RAMComponent::ExecuteMethod(GXemul* gxemul, const string& methodName,
115  const vector<string>& arguments)
116 {
117  if (methodName == "dump") {
118  uint64_t vaddr = m_lastDumpAddr;
119 
120  if (arguments.size() > 1) {
121  gxemul->GetUI()->ShowDebugMessage("syntax: .dump [addr]\n");
122  return;
123  }
124 
125  if (arguments.size() == 1) {
126  gxemul->GetUI()->ShowDebugMessage("TODO: parse address expression\n");
127  gxemul->GetUI()->ShowDebugMessage("(for now, only hex immediate values are supported!)\n");
128 
129  stringstream ss;
130  ss << arguments[0];
131  ss.flags(std::ios::hex);
132  ss >> vaddr;
133  }
134 
135  const int nRows = 16;
136  for (int i=0; i<nRows; i++) {
137  const size_t len = 16;
138  unsigned char data[len];
139  bool readable[len];
140 
141  stringstream ss;
142  ss.flags(std::ios::hex);
143 
144  if (vaddr > 0xffffffff)
145  ss << std::setw(16);
146  else
147  ss << std::setw(8);
148 
149  ss << std::setfill('0') << vaddr;
150 
151  size_t k;
152  for (k=0; k<len; ++k) {
153  AddressSelect(vaddr + k);
154  readable[k] = ReadData(data[k], BigEndian);
155  }
156 
157  ss << " ";
158 
159  for (k=0; k<len; ++k) {
160  if ((k&3) == 0)
161  ss << " ";
162 
163  ss << std::setw(2) << std::setfill('0');
164  if (readable[k])
165  ss << (int)data[k];
166  else
167  ss << "--";
168  }
169 
170  ss << " ";
171 
172  for (k=0; k<len; ++k) {
173  char s[2];
174  s[0] = data[k] >= 32 && data[k] < 127? data[k] : '.';
175  s[1] = '\0';
176 
177  if (readable[k])
178  ss << s;
179  else
180  ss << "-";
181  }
182 
183  ss << "\n";
184 
185  gxemul->GetUI()->ShowDebugMessage(ss.str());
186 
187  vaddr += len;
188  }
189 
190  m_lastDumpAddr = vaddr;
191 
192  return;
193  }
194 
195  // Call base...
196  Component::ExecuteMethod(gxemul, methodName, arguments);
197 }
198 
199 
201 {
202  return this;
203 }
204 
205 
206 void RAMComponent::AddressSelect(uint64_t address)
207 {
208  m_addressSelect = address;
209 
210  uint64_t blockNr = address >> m_blockSizeShift;
211 
212  if (blockNr+1 > m_memoryBlocks.size())
213  m_selectedHostMemoryBlock = NULL;
214  else
215  m_selectedHostMemoryBlock = m_memoryBlocks[blockNr];
216 
217  m_selectedOffsetWithinBlock = address & (m_blockSize-1);
218 }
219 
220 
221 void* RAMComponent::AllocateBlock()
222 {
223  void * p = mmap(NULL, m_blockSize, PROT_WRITE | PROT_READ,
224  MAP_ANON | MAP_PRIVATE, -1, 0);
225 
226  if (p == MAP_FAILED || p == NULL) {
227  std::cerr << "RAMComponent::AllocateBlock: Could not allocate "
228  << m_blockSize << " bytes. Aborting.\n";
229  throw std::exception();
230  }
231 
232  uint64_t blockNr = m_addressSelect >> m_blockSizeShift;
233 
234  if (blockNr+1 > m_memoryBlocks.size())
235  m_memoryBlocks.resize(blockNr + 1);
236 
237  m_memoryBlocks[blockNr] = p;
238 
239  return p;
240 }
241 
242 
243 bool RAMComponent::ReadData(uint8_t& data, Endianness endianness)
244 {
245  if (m_selectedHostMemoryBlock == NULL)
246  data = 0;
247  else
248  data = (((uint8_t*)m_selectedHostMemoryBlock)
249  [m_selectedOffsetWithinBlock]);
250 
251  return true;
252 }
253 
254 
255 bool RAMComponent::ReadData(uint16_t& data, Endianness endianness)
256 {
257  assert((m_addressSelect & 1) == 0);
258 
259  if (m_selectedHostMemoryBlock == NULL)
260  data = 0;
261  else
262  data = (((uint16_t*)m_selectedHostMemoryBlock)
263  [m_selectedOffsetWithinBlock >> 1]);
264 
265  if (endianness == BigEndian)
266  data = BE16_TO_HOST(data);
267  else
268  data = LE16_TO_HOST(data);
269 
270  return true;
271 }
272 
273 
274 bool RAMComponent::ReadData(uint32_t& data, Endianness endianness)
275 {
276  assert((m_addressSelect & 3) == 0);
277 
278  if (m_selectedHostMemoryBlock == NULL)
279  data = 0;
280  else
281  data = (((uint32_t*)m_selectedHostMemoryBlock)
282  [m_selectedOffsetWithinBlock >> 2]);
283 
284  if (endianness == BigEndian)
285  data = BE32_TO_HOST(data);
286  else
287  data = LE32_TO_HOST(data);
288 
289  return true;
290 }
291 
292 
293 bool RAMComponent::ReadData(uint64_t& data, Endianness endianness)
294 {
295  assert((m_addressSelect & 7) == 0);
296 
297  if (m_selectedHostMemoryBlock == NULL)
298  data = 0;
299  else
300  data = (((uint64_t*)m_selectedHostMemoryBlock)
301  [m_selectedOffsetWithinBlock >> 3]);
302 
303  if (endianness == BigEndian)
304  data = BE64_TO_HOST(data);
305  else
306  data = LE64_TO_HOST(data);
307 
308  return true;
309 }
310 
311 
312 bool RAMComponent::WriteData(const uint8_t& data, Endianness endianness)
313 {
314  if (m_writeProtected)
315  return false;
316 
317  if (m_selectedHostMemoryBlock == NULL)
318  m_selectedHostMemoryBlock = AllocateBlock();
319 
320  (((uint8_t*)m_selectedHostMemoryBlock)
321  [m_selectedOffsetWithinBlock]) = data;
322 
323  return true;
324 }
325 
326 
327 bool RAMComponent::WriteData(const uint16_t& data, Endianness endianness)
328 {
329  assert((m_addressSelect & 1) == 0);
330 
331  if (m_writeProtected)
332  return false;
333 
334  if (m_selectedHostMemoryBlock == NULL)
335  m_selectedHostMemoryBlock = AllocateBlock();
336 
337  uint16_t d;
338  if (endianness == BigEndian)
339  d = BE16_TO_HOST(data);
340  else
341  d = LE16_TO_HOST(data);
342 
343  (((uint16_t*)m_selectedHostMemoryBlock)
344  [m_selectedOffsetWithinBlock >> 1]) = d;
345 
346  return true;
347 }
348 
349 
350 bool RAMComponent::WriteData(const uint32_t& data, Endianness endianness)
351 {
352  assert((m_addressSelect & 3) == 0);
353 
354  if (m_writeProtected)
355  return false;
356 
357  if (m_selectedHostMemoryBlock == NULL)
358  m_selectedHostMemoryBlock = AllocateBlock();
359 
360  uint32_t d;
361  if (endianness == BigEndian)
362  d = BE32_TO_HOST(data);
363  else
364  d = LE32_TO_HOST(data);
365 
366  (((uint32_t*)m_selectedHostMemoryBlock)
367  [m_selectedOffsetWithinBlock >> 2]) = d;
368 
369  return true;
370 }
371 
372 
373 bool RAMComponent::WriteData(const uint64_t& data, Endianness endianness)
374 {
375  assert((m_addressSelect & 7) == 0);
376 
377  if (m_writeProtected)
378  return false;
379 
380  if (m_selectedHostMemoryBlock == NULL)
381  m_selectedHostMemoryBlock = AllocateBlock();
382 
383  uint64_t d;
384  if (endianness == BigEndian)
385  d = BE64_TO_HOST(data);
386  else
387  d = LE64_TO_HOST(data);
388 
389  (((uint64_t*)m_selectedHostMemoryBlock)
390  [m_selectedOffsetWithinBlock >> 3]) = d;
391 
392  return true;
393 }
394 
395 
396 /*****************************************************************************/
397 
398 
399 #ifdef WITHUNITTESTS
400 
401 #include "ComponentFactory.h"
402 
403 static void Test_RAMComponent_IsStable()
404 {
405  UnitTest::Assert("the RAMComponent should be stable",
406  ComponentFactory::HasAttribute("ram", "stable"));
407 }
408 
409 static void Test_RAMComponent_AddressDataBus()
410 {
412 
413  AddressDataBus* bus = ram->AsAddressDataBus();
414  UnitTest::Assert("The RAMComponent should implement the "
415  "AddressDataBus interface", bus != NULL);
416 }
417 
418 static void Test_RAMComponent_InitiallyZero()
419 {
421  AddressDataBus* bus = ram->AsAddressDataBus();
422 
423  bus->AddressSelect(0);
424 
425  // By default, RAM should be zero-filled:
426  uint8_t data8 = 42;
427  bus->ReadData(data8);
428  UnitTest::Assert("A: memory should be zero filled (8)", data8, 0);
429 
430  uint16_t data16 = 142;
431  bus->ReadData(data16, BigEndian);
432  UnitTest::Assert("A: memory should be zero filled (16)", data16, 0);
433 
434  uint32_t data32 = 342;
435  bus->ReadData(data32, BigEndian);
436  UnitTest::Assert("A: memory should be zero filled (32)", data32, 0);
437 
438  uint64_t data64 = 942;
439  bus->ReadData(data64, BigEndian);
440  UnitTest::Assert("A: memory should be zero filled (64)", data64, 0);
441 
442  bus->AddressSelect(0x10000);
443 
444  data8 = 43;
445  bus->ReadData(data8);
446  UnitTest::Assert("B: memory should be zero filled (8)", data8, 0);
447 
448  data16 = 143;
449  bus->ReadData(data16, BigEndian);
450  UnitTest::Assert("B: memory should be zero filled (16)", data16, 0);
451 
452  data32 = 343;
453  bus->ReadData(data32, BigEndian);
454  UnitTest::Assert("B: memory should be zero filled (32)", data32, 0);
455 
456  data64 = 943;
457  bus->ReadData(data64, BigEndian);
458  UnitTest::Assert("B: memory should be zero filled (64)", data64, 0);
459 }
460 
461 static void Test_RAMComponent_WriteThenRead()
462 {
464  AddressDataBus* bus = ram->AsAddressDataBus();
465 
466  bus->AddressSelect(256);
467 
468  uint64_t data64 = ((uint64_t)0x1234567 << 32) | 0x89abcdef;
469  bus->WriteData(data64, BigEndian);
470 
471  uint64_t data64_b = 0;
472  bus->ReadData(data64_b, BigEndian);
473 
474  UnitTest::Assert("memory should be same when read", data64_b, data64);
475 
476  uint32_t data32_b = 0;
477  bus->ReadData(data32_b, BigEndian);
478 
479  UnitTest::Assert("32-bit read should give top 32 bits, "
480  "in big endian mode", data32_b, data64 >> 32);
481 
482  uint16_t data16_b = 0;
483  bus->ReadData(data16_b, BigEndian);
484 
485  UnitTest::Assert("16-bit read should give top 16 bits, "
486  "in big endian mode", data16_b, data64 >> 48);
487 
488  uint8_t data8_b = 0;
489  bus->ReadData(data8_b);
490 
491  UnitTest::Assert("8-bit read should give top 8 bits, "
492  "in big endian mode", data8_b, data64 >> 56);
493 }
494 
495 static void Test_RAMComponent_WriteThenRead_ReverseEndianness()
496 {
498  AddressDataBus* bus = ram->AsAddressDataBus();
499 
500  bus->AddressSelect(256);
501 
502  uint64_t data64 = ((uint64_t)0x1234567 << 32) | 0x89abcdef;
503  bus->WriteData(data64, BigEndian);
504 
505  bus->AddressSelect(256 + 4);
506 
507  uint32_t data32_b = 0;
508  bus->ReadData(data32_b, LittleEndian);
509 
510  UnitTest::Assert("32-bit read", data32_b, 0xefcdab89);
511 
512  uint16_t data16_b = 0;
513  bus->ReadData(data16_b, LittleEndian);
514 
515  UnitTest::Assert("16-bit read", data16_b, 0xab89);
516 
517  uint8_t data8_b = 0;
518  bus->ReadData(data8_b);
519 
520  UnitTest::Assert("8-bit read", data8_b, 0x89);
521 }
522 
523 static void Test_RAMComponent_WriteProtect()
524 {
526  AddressDataBus* bus = ram->AsAddressDataBus();
527 
528  uint32_t data32 = 0x89abcdef;
529  bus->AddressSelect(256);
530  UnitTest::Assert("non-writeprotected write should succeed",
531  bus->WriteData(data32, BigEndian));
532 
533  uint16_t data16_a = 0;
534  bus->AddressSelect(256 + 2);
535  bus->ReadData(data16_a, BigEndian);
536  UnitTest::Assert("16-bit read", data16_a, 0xcdef);
537 
538  ram->SetVariableValue("writeProtect", "true");
539 
540  data32 = 0x11223344;
541  bus->AddressSelect(256);
542  UnitTest::Assert("writeprotected write should fail",
543  bus->WriteData(data32, BigEndian) == false);
544 
545  data16_a = 0;
546  bus->AddressSelect(256 + 2);
547  bus->ReadData(data16_a, BigEndian);
548  UnitTest::Assert("16-bit read", data16_a, 0xcdef);
549 
550  ram->SetVariableValue("writeProtect", "false");
551 
552  data32 = 0x12345678;
553  bus->AddressSelect(256);
554  UnitTest::Assert("write should succeed again",
555  bus->WriteData(data32, BigEndian));
556 
557  data16_a = 0;
558  bus->AddressSelect(256 + 2);
559  bus->ReadData(data16_a, BigEndian);
560  UnitTest::Assert("16-bit read", data16_a, 0x5678);
561 }
562 
563 static void Test_RAMComponent_ClearOnReset()
564 {
566  AddressDataBus* bus = ram->AsAddressDataBus();
567 
568  uint32_t data32 = 0x89abcdef;
569  bus->AddressSelect(256);
570  bus->WriteData(data32, BigEndian);
571 
572  uint16_t data16_a = 0;
573  bus->AddressSelect(256 + 2);
574  bus->ReadData(data16_a, BigEndian);
575  UnitTest::Assert("16-bit read", data16_a, 0xcdef);
576 
577  ram->Reset();
578 
579  uint16_t data16_b = 0;
580  bus->AddressSelect(256 + 2);
581  bus->ReadData(data16_b, BigEndian);
582  UnitTest::Assert("reset should have cleared RAM", data16_b, 0x0000);
583 }
584 
585 static void Test_RAMComponent_Clone()
586 {
588  AddressDataBus* bus = ram->AsAddressDataBus();
589 
590  uint32_t data32 = 0x89abcdef;
591  bus->AddressSelect(4);
592  bus->WriteData(data32, BigEndian);
593 
594  uint16_t data16_a = 0x1234;
595  bus->AddressSelect(10);
596  bus->WriteData(data16_a, LittleEndian);
597 
598  UnitTest::Assert("serialization/deserialization failed?", ram->CheckConsistency());
599 
600  refcount_ptr<Component> clone = ram->Clone();
601  bus = clone->AsAddressDataBus();
602 
603  data32 = 0x22222222;
604  bus->AddressSelect(4);
605  bus->ReadData(data32, LittleEndian);
606  UnitTest::Assert("32-bit read", data32, 0xefcdab89);
607 
608  data16_a = 0xffff;
609  bus->AddressSelect(10);
610  bus->ReadData(data16_a, BigEndian);
611  UnitTest::Assert("16-bit read", data16_a, 0x3412);
612 }
613 
614 static void Test_RAMComponent_ManualSerialization()
615 {
617  AddressDataBus* bus = ram->AsAddressDataBus();
618 
619  uint32_t data32 = 0x89abcde5;
620  bus->AddressSelect(4);
621  bus->WriteData(data32, BigEndian);
622 
623  uint16_t data16_a = 0x1235;
624  bus->AddressSelect(10);
625  bus->WriteData(data16_a, LittleEndian);
626 
627  SerializationContext context;
628  stringstream ss;
629  ram->Serialize(ss, context);
630 
631  string result = ss.str();
632  size_t pos = 0;
633  stringstream messages;
634  refcount_ptr<Component> ram2 = Component::Deserialize(messages, result, pos);
635  bus = ram2->AsAddressDataBus();
636 
637  data32 = 0x22222222;
638  bus->AddressSelect(4);
639  bus->ReadData(data32, LittleEndian);
640  UnitTest::Assert("32-bit read", data32, 0xe5cdab89);
641 
642  data16_a = 0xffff;
643  bus->AddressSelect(10);
644  bus->ReadData(data16_a, BigEndian);
645  UnitTest::Assert("16-bit read", data16_a, 0x3512);
646 }
647 
648 static void Test_RAMComponent_Methods_Reexecutableness()
649 {
651 
652  UnitTest::Assert("dump method SHOULD be re-executable"
653  " without args", ram->MethodMayBeReexecutedWithoutArgs("dump") == true);
654 
655  UnitTest::Assert("nonexistant method should NOT be re-executable"
656  " without args", ram->MethodMayBeReexecutedWithoutArgs("nonexistant") == false);
657 }
658 
660 {
661  UNITTEST(Test_RAMComponent_IsStable);
662  UNITTEST(Test_RAMComponent_AddressDataBus);
663  UNITTEST(Test_RAMComponent_InitiallyZero);
664  UNITTEST(Test_RAMComponent_WriteThenRead);
665  UNITTEST(Test_RAMComponent_WriteThenRead_ReverseEndianness);
666  UNITTEST(Test_RAMComponent_WriteProtect);
667  UNITTEST(Test_RAMComponent_ClearOnReset);
668  UNITTEST(Test_RAMComponent_Clone);
669  UNITTEST(Test_RAMComponent_ManualSerialization);
670  UNITTEST(Test_RAMComponent_Methods_Reexecutableness);
671 }
672 
673 #endif
674 
virtual void ShowDebugMessage(const string &msg)=0
Shows a debug message.
#define LE16_TO_HOST(x)
Definition: misc.h:172
static refcount_ptr< Component > Deserialize(ostream &messages, const string &str, size_t &pos)
Deserializes a string into a component tree.
Definition: Component.cc:1130
virtual bool MethodMayBeReexecutedWithoutArgs(const string &methodName) const
Returns whether a method name may be re-executed without args.
Definition: Component.cc:399
RAMComponent(const string &visibleClassName="ram")
Constructs a RAMComponent.
Definition: RAMComponent.cc:36
static refcount_ptr< Component > CreateComponent(const string &componentNameAndOptionalArgs, GXemul *gxemul=NULL)
Creates a component given a short component name.
#define LE64_TO_HOST(x)
Definition: misc.h:188
virtual AddressDataBus * AsAddressDataBus()
Returns the component&#39;s AddressDataBus interface.
virtual bool WriteData(const uint8_t &data, Endianness endianness)
Writes 8-bit data to the currently selected address.
#define BE32_TO_HOST(x)
Definition: misc.h:181
bool AddCustomVariable(const string &name, CustomStateVariableHandler *variableHandler)
Adds a custom state variable to the Component.
Definition: Component.h:586
virtual void ExecuteMethod(GXemul *gxemul, const string &methodName, const vector< string > &arguments)
Executes a method on the component.
Definition: Component.cc:406
bool AddVariable(const string &name, T *variablePointer)
Adds a state variable of type T to the Component.
Definition: Component.h:563
virtual bool WriteData(const uint8_t &data, Endianness endianness=BigEndian)=0
Writes 8-bit data to the currently selected address.
Endianness
Definition: misc.h:156
An interface for implementing components that read/write data via an address bus. ...
static string GetAttribute(const string &attributeName)
Creates a Component.
Definition: Component.cc:66
The main emulator class.
Definition: GXemul.h:54
#define UNITTESTS(class)
Helper for unit test case execution.
Definition: UnitTest.h:184
#define LE32_TO_HOST(x)
Definition: misc.h:180
static refcount_ptr< Component > Create(const ComponentCreateArgs &args)
Creates a RAMComponent.
Definition: RAMComponent.cc:70
virtual bool MethodMayBeReexecutedWithoutArgs(const string &methodName) const
Returns whether a method name may be re-executed without args.
virtual void GetMethodNames(vector< string > &names) const
Retrieves a component&#39;s implemented method names.
Definition: RAMComponent.cc:94
u_short data
Definition: siireg.h:79
static bool HasAttribute(const string &name, const string &attributeName)
Checks if a component has a specific attribute.
virtual void GetMethodNames(vector< string > &names) const
Retrieves a component&#39;s implemented method names.
Definition: Component.cc:393
#define BE16_TO_HOST(x)
Definition: misc.h:173
A context used during serialization of objects.
virtual bool ReadData(uint8_t &data, Endianness endianness=BigEndian)=0
Reads 8-bit data from the currently selected address.
virtual ~RAMComponent()
Definition: RAMComponent.cc:53
bool CheckConsistency() const
Checks consistency by serializing and deserializing the component (including all its child components...
Definition: Component.cc:1226
static string GetAttribute(const string &attributeName)
Get attribute information about the RAMComponent class.
Definition: RAMComponent.cc:76
A Random Access Memory Component.
Definition: RAMComponent.h:73
virtual bool ReadData(uint8_t &data, Endianness endianness)
Reads 8-bit data from the currently selected address.
void Serialize(ostream &ss, SerializationContext &context) const
Serializes the Component into a string stream.
Definition: Component.cc:1070
virtual void ResetState()
Resets the state variables of this component.
Definition: RAMComponent.cc:88
virtual void AddressSelect(uint64_t address)
Place an address on the bus.
virtual void ExecuteMethod(GXemul *gxemul, const string &methodName, const vector< string > &arguments)
Executes a method on the component.
A base-class for memory-mapped components.
static void Assert(const string &strFailMessage, bool condition)
Asserts that a boolean condition is correct.
Definition: UnitTest.cc:40
virtual void AddressSelect(uint64_t address)=0
Place an address on the bus.
#define BE64_TO_HOST(x)
Definition: misc.h:189
bool SetVariableValue(const string &name, const string &expression)
Sets a variable to a new value.
Definition: Component.cc:1030
refcount_ptr< Component > Clone() const
Clones the component and all its children.
Definition: Component.cc:76
virtual AddressDataBus * AsAddressDataBus()
Returns the component&#39;s AddressDataBus interface, if any.
Definition: Component.cc:367
void Reset()
Resets the state of this component and all its children.
Definition: Component.cc:281
UI * GetUI()
Gets a pointer to the GXemul instance&#39; active UI.
Definition: GXemul.cc:661
#define UNITTEST(functionname)
Helper for unit test case execution.
Definition: UnitTest.h:217

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