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Classes | |
struct | tulip_desc |
Macros | |
#define | _DEV_IC_TULIPREG_H_ |
#define | TDSTAT_OWN 0x80000000 /* Tulip owns descriptor */ |
#define | TDSTAT_ES 0x00008000 /* Error Summary */ |
#define | TDSTAT_Rx_FF 0x40000000 /* Filtering Fail */ |
#define | TDSTAT_WINB_Rx_RCMP 0x40000000 /* Receive Complete */ |
#define | TDSTAT_Rx_FL 0x3fff0000 /* Frame Length including CRC */ |
#define | TDSTAT_Rx_DE 0x00004000 /* Descriptor Error */ |
#define | TDSTAT_Rx_DT 0x00003000 /* Data Type */ |
#define | TDSTAT_Rx_RF 0x00000800 /* Runt Frame */ |
#define | TDSTAT_Rx_MF 0x00000400 /* Multicast Frame */ |
#define | TDSTAT_Rx_FS 0x00000200 /* First Descriptor */ |
#define | TDSTAT_Rx_LS 0x00000100 /* Last Descriptor */ |
#define | TDSTAT_Rx_TL 0x00000080 /* Frame Too Long */ |
#define | TDSTAT_Rx_CS 0x00000040 /* Collision Seen */ |
#define | TDSTAT_Rx_RT 0x00000020 /* Frame Type */ |
#define | TDSTAT_Rx_RW 0x00000010 /* Receive Watchdog */ |
#define | TDSTAT_Rx_RE 0x00000008 /* Report on MII Error */ |
#define | TDSTAT_Rx_DB 0x00000004 /* Dribbling Bit */ |
#define | TDSTAT_Rx_CE 0x00000002 /* CRC Error */ |
#define | TDSTAT_Rx_ZER 0x00000001 /* Zero (always 0) */ |
#define | TDSTAT_Rx_LENGTH(x) (((x) & TDSTAT_Rx_FL) >> 16) |
#define | TDSTAT_Rx_DT_SR 0x00000000 /* Serial Received Frame */ |
#define | TDSTAT_Rx_DT_IL 0x00001000 /* Internal Loopback Frame */ |
#define | TDSTAT_Rx_DT_EL 0x00002000 /* External Loopback Frame */ |
#define | TDSTAT_Rx_DT_r 0x00003000 /* Reserved */ |
#define | TDSTAT_WINB_Tx_TE 0x00008000 /* Transmit Error */ |
#define | TDSTAT_Tx_TO 0x00004000 /* Transmit Jabber Timeout */ |
#define | TDSTAT_Tx_LO 0x00000800 /* Loss of Carrier */ |
#define | TDSTAT_Tx_NC 0x00000400 /* No Carrier */ |
#define | TDSTAT_Tx_LC 0x00000200 /* Late Collision */ |
#define | TDSTAT_Tx_EC 0x00000100 /* Excessive Collisions */ |
#define | TDSTAT_Tx_HF 0x00000080 /* Heartbeat Fail */ |
#define | TDSTAT_Tx_CC 0x00000078 /* Collision Count */ |
#define | TDSTAT_Tx_LF 0x00000004 /* Link Fail */ |
#define | TDSTAT_Tx_UF 0x00000002 /* Underflow Error */ |
#define | TDSTAT_Tx_DE 0x00000001 /* Deferred */ |
#define | TDSTAT_Tx_COLLISIONS(x) (((x) & TDSTAT_Tx_CC) >> 3) |
#define | TDCTL_SIZE1 0x000007ff /* Size of buffer 1 */ |
#define | TDCTL_SIZE1_SHIFT 0 |
#define | TDCTL_SIZE2 0x003ff800 /* Size of buffer 2 */ |
#define | TDCTL_SIZE2_SHIFT 11 |
#define | TDCTL_ER 0x02000000 /* End of Ring */ |
#define | TDCTL_CH 0x01000000 /* Second Address Chained */ |
#define | TDCTL_Tx_IC 0x80000000 /* Interrupt on Completion */ |
#define | TDCTL_Tx_LS 0x40000000 /* Last Segment */ |
#define | TDCTL_Tx_FS 0x20000000 /* First Segment */ |
#define | TDCTL_Tx_FT1 0x10000000 /* Filtering Type 1 */ |
#define | TDCTL_Tx_SET 0x08000000 /* Setup Packet */ |
#define | TDCTL_Tx_AC 0x04000000 /* Add CRC Disable */ |
#define | TDCTL_Tx_DPD 0x00800000 /* Disabled Padding */ |
#define | TDCTL_Tx_FT0 0x00400000 /* Filtering Type 0 */ |
#define | TDCTL_Tx_FT_PERFECT 0 |
#define | TDCTL_Tx_FT_HASH TDCTL_Tx_FT0 |
#define | TDCTL_Tx_FT_INVERSE TDCTL_Tx_FT1 |
#define | TDCTL_Tx_FT_HASHONLY (TDCTL_Tx_FT1|TDCTL_Tx_FT0) |
#define | TULIP_SETUP_PACKET_LEN 192 |
#define | TULIP_MAXADDRS 16 |
#define | TULIP_MCHASHSIZE 512 |
#define | TULIP_PNICII_HASHSIZE 128 |
#define | TULIP_ROM_SIZE(bits) (2 << (bits)) |
#define | TULIP_MAX_ROM_SIZE 512 |
#define | TULIP_ROM_SROM_FORMAT_VERION 18 /* B */ |
#define | TULIP_ROM_CHIP_COUNT 19 /* B */ |
#define | TULIP_ROM_IEEE_NETWORK_ADDRESS 20 |
#define | TULIP_ROM_CHIPn_DEVICE_NUMBER(n) (26 + ((n) * 3))/* B */ |
#define | TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(n) (27 + ((n) * 3))/* W */ |
#define | TULIP_ROM_CRC32_CHECKSUM 126 /* W */ |
#define | TULIP_ROM_CRC32_CHECKSUM1 94 /* W */ |
#define | TULIP_ROM_IL_SELECT_CONN_TYPE 0 /* W */ |
#define | TULIP_ROM_IL_MEDIA_COUNT 2 /* B */ |
#define | TULIP_ROM_IL_MEDIAn_BLOCK_BASE 3 |
#define | SELECT_CONN_TYPE_TP 0x0000 |
#define | SELECT_CONN_TYPE_BNC 0x0001 |
#define | SELECT_CONN_TYPE_AUI 0x0002 |
#define | SELECT_CONN_TYPE_100TX 0x0003 |
#define | SELECT_CONN_TYPE_100T4 0x0006 |
#define | SELECT_CONN_TYPE_100FX 0x0007 |
#define | SELECT_CONN_TYPE MII_10T 0x0009 |
#define | SELECT_CONN_TYPE_MII_100TX 0x000d |
#define | SELECT_CONN_TYPE_MII_100T4 0x000f |
#define | SELECT_CONN_TYPE_MII_100FX 0x0010 |
#define | SELECT_CONN_TYPE_TP_AUTONEG 0x0100 |
#define | SELECT_CONN_TYPE_TP_FDX 0x0204 |
#define | SELECT_CONN_TYPE_MII_10T_FDX 0x020a |
#define | SELECT_CONN_TYPE_100TX_FDX 0x020e |
#define | SELECT_CONN_TYPE_MII_100TX_FDX 0x0211 |
#define | SELECT_CONN_TYPE_TP_NOLINKPASS 0x0400 |
#define | SELECT_CONN_TYPE_ASENSE 0x0800 |
#define | SELECT_CONN_TYPE_ASENSE_POWERUP 0x8800 |
#define | SELECT_CONN_TYPE_ASENSE_AUTONEG 0x0900 |
#define | TULIP_ROM_MB_MEDIA_CODE 0x3f |
#define | TULIP_ROM_MB_MEDIA_TP 0x00 |
#define | TULIP_ROM_MB_MEDIA_BNC 0x01 |
#define | TULIP_ROM_MB_MEDIA_AUI 0x02 |
#define | TULIP_ROM_MB_MEDIA_100TX 0x03 |
#define | TULIP_ROM_MB_MEDIA_TP_FDX 0x04 |
#define | TULIP_ROM_MB_MEDIA_100TX_FDX 0x05 |
#define | TULIP_ROM_MB_MEDIA_100T4 0x06 |
#define | TULIP_ROM_MB_MEDIA_100FX 0x07 |
#define | TULIP_ROM_MB_MEDIA_100FX_FDX 0x08 |
#define | TULIP_ROM_MB_EXT 0x40 |
#define | TULIP_ROM_MB_CSR13 1 /* W */ |
#define | TULIP_ROM_MB_CSR14 3 /* W */ |
#define | TULIP_ROM_MB_CSR15 5 /* W */ |
#define | TULIP_ROM_MB_SIZE(mc) (((mc) & TULIP_ROM_MB_EXT) ? 7 : 1) |
#define | TULIP_ROM_MB_NOINDICATOR 0x8000 |
#define | TULIP_ROM_MB_DEFAULT 0x4000 |
#define | TULIP_ROM_MB_POLARITY 0x0080 |
#define | TULIP_ROM_MB_OPMODE(x) (((x) & 0x71) << 18) |
#define | TULIP_ROM_MB_BITPOS(x) (1 << (((x) & 0x0e) >> 1)) |
#define | TULIP_ROM_MB_21140_GPR 0 /* 21140[A] GPR block */ |
#define | TULIP_ROM_MB_21140_MII 1 /* 21140[A] MII block */ |
#define | TULIP_ROM_MB_21142_SIA 2 /* 2114[23] SIA block */ |
#define | TULIP_ROM_MB_21142_MII 3 /* 2114[23] MII block */ |
#define | TULIP_ROM_MB_21143_SYM 4 /* 21143 SYM block */ |
#define | TULIP_ROM_MB_21143_RESET 5 /* 21143 reset block */ |
#define | TULIP_ROM_GETW(data, off) |
#define | TULIP_CSR0 0x00 |
#define | TULIP_CSR1 0x08 |
#define | TULIP_CSR2 0x10 |
#define | TULIP_CSR3 0x18 |
#define | TULIP_CSR4 0x20 |
#define | TULIP_CSR5 0x28 |
#define | TULIP_CSR6 0x30 |
#define | TULIP_CSR7 0x38 |
#define | TULIP_CSR8 0x40 |
#define | TULIP_CSR9 0x48 |
#define | TULIP_CSR10 0x50 |
#define | TULIP_CSR11 0x58 |
#define | TULIP_CSR12 0x60 |
#define | TULIP_CSR13 0x68 |
#define | TULIP_CSR14 0x70 |
#define | TULIP_CSR15 0x78 |
#define | TULIP_CSR16 0x80 |
#define | TULIP_CSR17 0x88 |
#define | TULIP_CSR18 0x90 |
#define | TULIP_CSR19 0x98 |
#define | TULIP_CSR20 0xa0 |
#define | TULIP_CSR21 0xa8 |
#define | TULIP_CSR22 0xb0 |
#define | TULIP_CSR23 0xb8 |
#define | TULIP_CSR24 0xc0 |
#define | TULIP_CSR25 0xc8 |
#define | TULIP_CSR26 0xd0 |
#define | TULIP_CSR27 0xd8 |
#define | TULIP_CSR28 0xe0 |
#define | TULIP_CSR29 0xe8 |
#define | TULIP_CSR30 0xf0 |
#define | TULIP_CSR31 0xf8 |
#define | TULIP_CSR_INDEX(csr) ((csr) >> 3) |
#define | CSR_BUSMODE TULIP_CSR0 |
#define | BUSMODE_SWR 0x00000001 /* software reset */ |
#define | BUSMODE_BAR 0x00000002 /* bus arbitration */ |
#define | BUSMODE_DSL 0x0000007c /* descriptor skip length */ |
#define | BUSMODE_BLE 0x00000080 /* big endian */ |
#define | BUSMODE_PBL_DEFAULT 0x00000000 /* default value */ |
#define | BUSMODE_PBL_1LW 0x00000100 /* 1 longword */ |
#define | BUSMODE_PBL_2LW 0x00000200 /* 2 longwords */ |
#define | BUSMODE_PBL_4LW 0x00000400 /* 4 longwords */ |
#define | BUSMODE_PBL_8LW 0x00000800 /* 8 longwords */ |
#define | BUSMODE_PBL_16LW 0x00001000 /* 16 longwords */ |
#define | BUSMODE_PBL_32LW 0x00002000 /* 32 longwords */ |
#define | BUSMODE_CAL_NONE 0x00000000 /* no alignment */ |
#define | BUSMODE_CAL_8LW 0x00004000 /* 8 longwords */ |
#define | BUSMODE_CAL_16LW 0x00008000 /* 16 longwords */ |
#define | BUSMODE_CAL_32LW 0x0000c000 /* 32 longwords */ |
#define | BUSMODE_DAS 0x00010000 /* diagnostic address space */ |
#define | BUSMODE_TAP_NONE 0x00000000 /* no auto-polling */ |
#define | BUSMODE_TAP_200us 0x00020000 /* 200 uS */ |
#define | BUSMODE_TAP_800us 0x00040000 /* 400 uS */ |
#define | BUSMODE_TAP_1_6ms 0x00060000 /* 1.6 mS */ |
#define | BUSMODE_TAP_12_8us 0x00080000 /* 12.8 uS (21041+) */ |
#define | BUSMODE_TAP_25_6us 0x000a0000 /* 25.6 uS (21041+) */ |
#define | BUSMODE_TAP_51_2us 0x000c0000 /* 51.2 uS (21041+) */ |
#define | BUSMODE_TAP_102_4us 0x000e0000 /* 102.4 uS (21041+) */ |
#define | BUSMODE_DBO 0x00100000 /* desc-only b/e (21041+) */ |
#define | BUSMODE_RME 0x00200000 /* rd/mult enab (21140+) */ |
#define | BUSMODE_WINB_WAIT 0x00200000 /* wait state insertion */ |
#define | BUSMODE_RLE 0x00800000 /* rd/line enab (21140+) */ |
#define | BUSMODE_WLE 0x01000000 /* wt/line enab (21140+) */ |
#define | BUSMODE_PNIC_MBO 0x04000000 /* magic `must be one' bit */ |
#define | CSR_TXPOLL TULIP_CSR1 |
#define | TXPOLL_TPD 0x00000001 /* transmit poll demand */ |
#define | CSR_RXPOLL TULIP_CSR2 |
#define | RXPOLL_RPD 0x00000001 /* receive poll demand */ |
#define | CSR_RXLIST TULIP_CSR3 |
#define | CSR_TXLIST TULIP_CSR4 |
#define | CSR_STATUS TULIP_CSR5 |
#define | STATUS_TI 0x00000001 /* transmit interrupt */ |
#define | STATUS_TPS 0x00000002 /* transmit process stopped */ |
#define | STATUS_TU 0x00000004 /* transmit buffer unavail */ |
#define | STATUS_TJT 0x00000008 /* transmit jabber timeout */ |
#define | STATUS_WINB_REI 0x00000008 /* receive early interrupt */ |
#define | STATUS_LNPANC 0x00000010 /* link pass (21041) */ |
#define | STATUS_WINB_RERR 0x00000010 /* receive error */ |
#define | STATUS_UNF 0x00000020 /* transmit underflow */ |
#define | STATUS_RI 0x00000040 /* receive interrupt */ |
#define | STATUS_RU 0x00000080 /* receive buffer unavail */ |
#define | STATUS_RPS 0x00000100 /* receive process stopped */ |
#define | STATUS_RWT 0x00000200 /* receive watchdog timeout */ |
#define | STATUS_AT |
#define | STATUS_ETI |
#define | STATUS_FD |
#define | STATUS_TM 0x00000800 /* timer expired (21041) */ |
#define | STATUS_LNF 0x00001000 /* link fail (21040) */ |
#define | STATUS_SE 0x00002000 /* system error */ |
#define | STATUS_ER 0x00004000 /* early receive (21041) */ |
#define | STATUS_AIS 0x00008000 /* abnormal interrupt summary */ |
#define | STATUS_NIS 0x00010000 /* normal interrupt summary */ |
#define | STATUS_RS 0x000e0000 /* receive process state */ |
#define | STATUS_RS_STOPPED 0x00000000 /* Stopped */ |
#define | STATUS_RS_FETCH |
#define | STATUS_RS_CHECK |
#define | STATUS_RS_WAIT 0x00060000 /* Running - wait for packet */ |
#define | STATUS_RS_SUSPENDED 0x00080000 /* Suspended */ |
#define | STATUS_RS_CLOSE |
#define | STATUS_RS_FLUSH |
#define | STATUS_RS_QUEUE |
#define | STATUS_DM_RS_STOPPED 0x00000000 /* Stopped */ |
#define | STATUS_DM_RS_FETCH |
#define | STATUS_DM_RS_WAIT 0x00040000 /* Running - wait for packet */ |
#define | STATUS_DM_RS_QUEUE |
#define | STATUS_DM_RS_CLOSE_OWN |
#define | STATUS_DM_RS_CLOSE_ST |
#define | STATUS_DM_RS_SUSPENDED 0x000c0000 /* Suspended */ |
#define | STATUS_DM_RS_FLUSH |
#define | STATUS_TS 0x00700000 /* transmit process state */ |
#define | STATUS_TS_STOPPED 0x00000000 /* Stopped */ |
#define | STATUS_TS_FETCH |
#define | STATUS_TS_WAIT |
#define | STATUS_TS_READING |
#define | STATUS_TS_RESERVED 0x00400000 /* RESERVED */ |
#define | STATUS_TS_SETUP 0x00500000 /* Running - Setup packet */ |
#define | STATUS_TS_SUSPENDED 0x00600000 /* Suspended */ |
#define | STATUS_TS_CLOSE |
#define | STATUS_DM_TS_STOPPED 0x00000000 /* Stopped */ |
#define | STATUS_DM_TS_FETCH |
#define | STATUS_DM_TS_SETUP 0x00200000 /* Running - Setup packet */ |
#define | STATUS_DM_TS_READING |
#define | STATUS_DM_TS_CLOSE_OWN |
#define | STATUS_DM_TS_WAIT |
#define | STATUS_DM_TS_CLOSE_ST |
#define | STATUS_DM_TS_SUSPENDED 0x00700000 /* Suspended */ |
#define | STATUS_EB 0x03800000 /* error bits */ |
#define | STATUS_EB_PARITY 0x00000000 /* parity errror */ |
#define | STATUS_EB_MABT 0x00800000 /* master abort */ |
#define | STATUS_EB_TABT 0x01000000 /* target abort */ |
#define | STATUS_GPPI 0x04000000 /* GPIO interrupt (21142) */ |
#define | STATUS_PNIC_TXABORT 0x04000000 /* transmit aborted */ |
#define | STATUS_LC |
#define | STATUS_PMAC_WKUPI 0x10000000 /* wake up event */ |
#define | STATUS_X3201_PMEIS |
#define | STATUS_X3201_SFIS |
#define | CSR_OPMODE TULIP_CSR6 |
#define | OPMODE_HP 0x00000001 /* hash/perfect mode (ro) */ |
#define | OPMODE_SR 0x00000002 /* start receive */ |
#define | OPMODE_HO 0x00000004 /* hash only mode (ro) */ |
#define | OPMODE_PB 0x00000008 /* pass bad frames */ |
#define | OPMODE_WINB_APP 0x00000008 /* accept all physcal packet */ |
#define | OPMODE_IF 0x00000010 /* inverse filter mode (ro) */ |
#define | OPMODE_WINB_AMP 0x00000010 /* accept multicast packet */ |
#define | OPMODE_SB 0x00000020 /* start backoff counter */ |
#define | OPMODE_WINB_ABP 0x00000020 /* accept broadcast packet */ |
#define | OPMODE_PR 0x00000040 /* promiscuous mode */ |
#define | OPMODE_WINB_ARP 0x00000040 /* accept runt packet */ |
#define | OPMODE_PM 0x00000080 /* pass all multicast */ |
#define | OPMODE_WINB_AEP 0x00000080 /* accept error packet */ |
#define | OPMODE_FKD 0x00000100 /* flaky oscillator disable */ |
#define | OPMODE_AX_RB 0x00000100 /* recieve broadcast packets */ |
#define | OPMODE_FD 0x00000200 /* full-duplex mode */ |
#define | OPMODE_OM 0x00000c00 /* operating mode */ |
#define | OPMODE_OM_NORMAL 0x00000000 /* normal mode */ |
#define | OPMODE_OM_INTLOOP 0x00000400 /* internal loopback */ |
#define | OPMODE_OM_EXTLOOP 0x00000800 /* external loopback */ |
#define | OPMODE_FC 0x00001000 /* force collision */ |
#define | OPMODE_ST 0x00002000 /* start transmitter */ |
#define | OPMODE_TR 0x0000c000 /* threshold control */ |
#define | OPMODE_TR_72 0x00000000 /* 72 bytes */ |
#define | OPMODE_TR_96 0x00004000 /* 96 bytes */ |
#define | OPMODE_TR_128 0x00008000 /* 128 bytes */ |
#define | OPMODE_TR_160 0x0000c000 /* 160 bytes */ |
#define | OPMODE_WINB_TTH 0x001fc000 /* transmit threshold */ |
#define | OPMODE_WINB_TTH_SHIFT 14 |
#define | OPMODE_BP 0x00010000 /* backpressure enable */ |
#define | OPMODE_CA 0x00020000 /* capture effect enable */ |
#define | OPMODE_PNIC_TBEN 0x00020000 /* Tx backoff offset enable */ |
#define | OPMODE_PS |
#define | OPMODE_HBD |
#define | OPMODE_PNIC_IT 0x00100000 /* immediate transmit */ |
#define | OPMODE_SF |
#define | OPMODE_WINB_REIT 0x1fe00000 /* receive eartly intr thresh */ |
#define | OPMODE_WINB_REIT_SHIFT 21 |
#define | OPMODE_TTM |
#define | OPMODE_PCS 0x00800000 /* PCS function (21140) */ |
#define | OPMODE_SCR 0x01000000 /* scrambler mode (21140) */ |
#define | OPMODE_MBO |
#define | OPMODE_IDAMSB |
#define | OPMODE_PNIC_DRC |
#define | OPMODE_WINB_FES 0x20000000 /* fast ethernet select */ |
#define | OPMODE_RA 0x40000000 /* receive all (21140) */ |
#define | OPMODE_PNIC_EED |
#define | OPMODE_WINB_TEIO 0x40000000 /* transmit early intr on */ |
#define | OPMODE_SC |
#define | OPMODE_WINB_REIO 0x80000000 /* receive early intr on */ |
#define | OPMODE_MEDIA_BITS (OPMODE_FD|OPMODE_PS|OPMODE_TTM|OPMODE_PCS|OPMODE_SCR) |
#define | CSR_INTEN TULIP_CSR7 |
#define | CSR_MISSED TULIP_CSR8 |
#define | MISSED_MFC 0x0000ffff /* missed packet count */ |
#define | MISSED_MFO |
#define | MISSED_FOC |
#define | MISSED_OCO |
#define | MISSED_GETMFC(x) ((x) & MISSED_MFC) |
#define | MISSED_GETFOC(x) (((x) & MISSED_FOC) >> 17) |
#define | CSR_MIIROM TULIP_CSR9 |
#define | MIIROM_DATA |
#define | MIIROM_SROMCS 0x00000001 /* SROM chip select */ |
#define | MIIROM_SROMSK 0x00000002 /* SROM clock */ |
#define | MIIROM_SROMDI 0x00000004 /* SROM data in (to) */ |
#define | MIIROM_SROMDO 0x00000008 /* SROM data out (from) */ |
#define | MIIROM_REG 0x00000400 /* external register select */ |
#define | MIIROM_SR 0x00000800 /* SROM select */ |
#define | MIIROM_BR 0x00001000 /* boot ROM select */ |
#define | MIIROM_WR 0x00002000 /* write to boot ROM */ |
#define | MIIROM_RD 0x00004000 /* read from boot ROM */ |
#define | MIIROM_MOD 0x00008000 /* mode select (ro) (21041) */ |
#define | MIIROM_MDC 0x00010000 /* MII clock */ |
#define | MIIROM_MDO 0x00020000 /* MII data out */ |
#define | MIIROM_MIIDIR |
#define | MIIROM_MDI 0x00080000 /* MII data in */ |
#define | MIIROM_DN 0x80000000 /* data not valid (21040) */ |
#define | MIIROM_PMAC_LED0SEL |
#define | MIIROM_PMAC_LED1SEL |
#define | MIIROM_PMAC_LED2SEL |
#define | MIIROM_PMAC_LED3SEL |
#define | TULIP_SROM_OPC_ERASE 0x04 |
#define | TULIP_SROM_OPC_WRITE 0x05 |
#define | TULIP_SROM_OPC_READ 0x06 |
#define | PNIC_MIIROM_DATA 0x0000ffff /* mask of data bits ??? */ |
#define | PNIC_MIIROM_BUSY 0x80000000 /* EEPROM is busy */ |
#define | CSR_ROMADDR TULIP_CSR10 |
#define | ROMADDR_MASK 0x000003ff /* boot rom address */ |
#define | CSR_GPT TULIP_CSR11 |
#define | GPT_VALUE 0x0000ffff /* timer value */ |
#define | GPT_CON 0x00010000 /* continuous mode */ |
#define | GPT_NRX 0x000e0000 /* number of Rx packets */ |
#define | GPT_RXT 0x00f00000 /* Rx timer */ |
#define | GPT_NTX 0x07000000 /* number of Tx packets */ |
#define | GPT_TXT 0x78000000 /* Tx timer */ |
#define | GPT_CYCLE 0x80000000 /* cycle size */ |
#define | CSR_SIASTAT TULIP_CSR12 |
#define | SIASTAT_PAUI |
#define | SIASTAT_MRA |
#define | SIASTAT_NCR 0x00000002 /* network connection error */ |
#define | SIASTAT_LS100 |
#define | SIASTAT_LKF 0x00000004 /* link fail status */ |
#define | SIASTAT_LS10 |
#define | SIASTAT_APS 0x00000008 /* auto polarity status */ |
#define | SIASTAT_DSD 0x00000010 /* PLL self test done */ |
#define | SIASTAT_DSP 0x00000020 /* PLL self test pass */ |
#define | SIASTAT_DAZ 0x00000040 /* PLL all zero */ |
#define | SIASTAT_DAO 0x00000080 /* PLL all one */ |
#define | SIASTAT_SRA |
#define | SIASTAT_ARA |
#define | SIASTAT_NRA |
#define | SIASTAT_TRA |
#define | SIASTAT_NSN |
#define | SIASTAT_TRF |
#define | SIASTAT_ANS |
#define | SIASTAT_ANS_DIS 0x00000000 /* disabled */ |
#define | SIASTAT_ANS_TXDIS 0x00001000 /* transmit disabled */ |
#define | SIASTAT_ANS_START 0x00001000 /* (MX98715AEC) */ |
#define | SIASTAT_ANS_ABD 0x00002000 /* ability detect */ |
#define | SIASTAT_ANS_ACKD 0x00003000 /* acknowledge detect */ |
#define | SIASTAT_ANS_ACKC 0x00004000 /* complete acknowledge */ |
#define | SIASTAT_ANS_FLPGOOD 0x00005000 /* FLP link good */ |
#define | SIASTAT_ANS_LINKCHECK 0x00006000 /* link check */ |
#define | SIASTAT_LPN |
#define | SIASTAT_LPC 0xffff0000 /* link partner code word */ |
#define | SIASTAT_GETLPC(x) (((x) & SIASTAT_LPC) >> 16) |
#define | CSR_SIACONN TULIP_CSR13 |
#define | SIACONN_SRL |
#define | SIACONN_PS |
#define | SIACONN_CAC 0x00000004 /* CSR autoconfiguration */ |
#define | SIACONN_AUI 0x00000008 /* select AUI (0 = TP) */ |
#define | SIACONN_EDP |
#define | SIACONN_ENI |
#define | SIACONN_SIM |
#define | SIACONN_ASE |
#define | SIACONN_SEL |
#define | SIACONN_IE 0x00001000 /* input enable (21040) */ |
#define | SIACONN_OE1_3 |
#define | SIACONN_OE2_4 |
#define | SIACONN_OE5_6_7 |
#define | SIACONN_SDM |
#define | CSR_SIATXRX TULIP_CSR14 |
#define | SIATXRX_ECEN 0x00000001 /* encoder enable */ |
#define | SIATXRX_LBK 0x00000002 /* loopback enable */ |
#define | SIATXRX_DREN 0x00000004 /* driver enable */ |
#define | SIATXRX_LSE 0x00000008 /* link pulse send enable */ |
#define | SIATXRX_CPEN 0x00000030 /* compensation enable */ |
#define | SIATXRX_CPEN_DIS0 0x00000000 /* disabled */ |
#define | SIATXRX_CPEN_DIS1 0x00000010 /* disabled */ |
#define | SIATXRX_CPEN_HIGHPWR 0x00000020 /* high power */ |
#define | SIATXRX_CPEN_NORMAL 0x00000030 /* normal */ |
#define | SIATXRX_MBO 0x00000040 /* must be one (21041 pass 2) */ |
#define | SIATXRX_TH 0x00000040 /* 10baseT HDX enable (21142) */ |
#define | SIATXRX_ANE |
#define | SIATXRX_RSQ 0x00000100 /* receive squelch enable */ |
#define | SIATXRX_CSQ 0x00000200 /* collision squelch enable */ |
#define | SIATXRX_CLD 0x00000400 /* collision detect enable */ |
#define | SIATXRX_SQE |
#define | SIATXRX_LTE 0x00001000 /* link test enable */ |
#define | SIATXRX_APE 0x00002000 /* auto-polarity enable */ |
#define | SIATXRX_SPP 0x00004000 /* set polarity plus */ |
#define | SIATXRX_TAS |
#define | SIATXRX_THX 0x00010000 /* 100baseTX-HDX (21142) */ |
#define | SIATXRX_TXF 0x00020000 /* 100baseTX-FDX (21142) */ |
#define | SIATXRX_T4 0x00040000 /* 100baseT4 (21142) */ |
#define | CSR_SIAGEN TULIP_CSR15 |
#define | SIAGEN_JBD 0x00000001 /* jabber disable */ |
#define | SIAGEN_HUJ 0x00000002 /* host unjab */ |
#define | SIAGEN_JCK 0x00000004 /* jabber clock */ |
#define | SIAGEN_ABM 0x00000008 /* BNC select (21041) */ |
#define | SIAGEN_RWD 0x00000010 /* receive watchdog disable */ |
#define | SIAGEN_RWR 0x00000020 /* receive watchdog release */ |
#define | SIAGEN_LE1 0x00000040 /* LED 1 enable (21041) */ |
#define | SIAGEN_LV1 0x00000080 /* LED 1 value (21041) */ |
#define | SIAGEN_TSCK 0x00000100 /* test clock */ |
#define | SIAGEN_FUSQ 0x00000200 /* force unsquelch */ |
#define | SIAGEN_FLF 0x00000400 /* force link fail */ |
#define | SIAGEN_LSD |
#define | SIAGEN_LEE 0x00000800 /* Link extend enable (21142) */ |
#define | SIAGEN_DPST 0x00001000 /* PLL self-test start */ |
#define | SIAGEN_FRL 0x00002000 /* force receiver low */ |
#define | SIAGEN_LE2 0x00004000 /* LED 2 enable (21041) */ |
#define | SIAGEN_RMP |
#define | SIAGEN_LV2 0x00008000 /* LED 2 value (21041) */ |
#define | SIAGEN_HCKR 0x00008000 /* hacker (21143) */ |
#define | SIAGEN_MD 0x000f0000 /* general purpose mode/data */ |
#define | SIAGEN_LGS0 0x00100000 /* LED/GEP 0 select */ |
#define | SIAGEN_LGS1 0x00200000 /* LED/GEP 1 select */ |
#define | SIAGEN_LGS2 0x00400000 /* LED/GEP 2 select */ |
#define | SIAGEN_LGS3 0x00800000 /* LED/GEP 3 select */ |
#define | SIAGEN_GEI0 0x01000000 /* GEP pin 0 intr enable */ |
#define | SIAGEN_GEI1 0x02000000 /* GEP pin 1 intr enable */ |
#define | SIAGEN_RME 0x04000000 /* receive match enable */ |
#define | SIAGEN_CWE 0x08000000 /* control write enable */ |
#define | SIAGEN_GI0 0x10000000 /* GEP pin 0 interrupt */ |
#define | SIAGEN_GI1 0x20000000 /* GEP pin 1 interrupt */ |
#define | SIAGEN_RMI 0x40000000 /* receive match interrupt */ |
#define | CSR_GPP TULIP_CSR12 |
#define | GPP_MD 0x000000ff /* general purpose mode/data */ |
#define | GPP_GPC 0x00000100 /* general purpose control */ |
#define | GPP_PNIC_GPD 0x0000000f /* general purpose data */ |
#define | GPP_PNIC_GPC 0x000000f0 /* general purpose control */ |
#define | GPP_PNIC_IN(x) (1 << (x)) |
#define | GPP_PNIC_OUT(x, on) (((on) << (x)) | (1 << ((x) + 4))) |
#define | GPP_PNIC_PIN_SPEED_RLY 0 |
#define | GPP_PNIC_PIN_100M_LPKB 1 |
#define | GPP_PNIC_PIN_BNC_XMER 2 |
#define | GPP_PNIC_PIN_LNK100X 3 |
#define | GPP_SMC9332DST_PINS 0x3f /* General Purpose Pin directions */ |
#define | GPP_SMC9332DST_OK10 0x80 /* 10 Mb/sec Signal Detect gep<7> */ |
#define | GPP_SMC9332DST_OK100 0x40 /* 100 Mb/sec Signal Detect gep<6> */ |
#define | GPP_SMC9332DST_INIT 0x09 /* No loopback --- point-to-point */ |
#define | GPP_COGENT_EM1x0_PINS 0x3f /* General Purpose Pin directions */ |
#define | GPP_COGENT_EM1x0_INIT 0x09 /* No loopback --- point-to-point */ |
#define | CSR_21040_FDX TULIP_CSR11 |
#define | FDX21040_FDXACV |
#define | SIACONN_21040_10BASET 0x0000ef01 |
#define | SIATXRX_21040_10BASET 0x0000ffff |
#define | SIAGEN_21040_10BASET 0x00000000 |
#define | SIACONN_21040_10BASET_FDX 0x0000ef01 |
#define | SIATXRX_21040_10BASET_FDX 0x0000fffd |
#define | SIAGEN_21040_10BASET_FDX 0x00000000 |
#define | SIACONN_21040_AUI 0x0000ef09 |
#define | SIATXRX_21040_AUI 0x00000705 |
#define | SIAGEN_21040_AUI 0x00000006 |
#define | SIACONN_21040_EXTSIA 0x00003041 |
#define | SIATXRX_21040_EXTSIA 0x00000000 |
#define | SIAGEN_21040_EXTSIA 0x00000006 |
#define | SIACONN_21041_10BASET 0x0000ef01 |
#define | SIATXRX_21041_10BASET 0x0000ff3f |
#define | SIAGEN_21041_10BASET 0x00000000 |
#define | SIACONN_21041P2_10BASET SIACONN_21041_10BASET |
#define | SIATXRX_21041P2_10BASET 0x0000ffff |
#define | SIAGEN_21041P2_10BASET SIAGEN_21041_10BASET |
#define | SIACONN_21041_10BASET_FDX 0x0000ef01 |
#define | SIATXRX_21041_10BASET_FDX 0x0000ff3d |
#define | SIAGEN_21041_10BASET_FDX 0x00000000 |
#define | SIACONN_21041P2_10BASET_FDX SIACONN_21041_10BASET_FDX |
#define | SIATXRX_21041P2_10BASET_FDX 0x0000ffff |
#define | SIAGEN_21041P2_10BASET_FDX SIAGEN_21041_10BASET_FDX |
#define | SIACONN_21041_AUI 0x0000ef09 |
#define | SIATXRX_21041_AUI 0x0000f73d |
#define | SIAGEN_21041_AUI 0x0000000e |
#define | SIACONN_21041P2_AUI SIACONN_21041_AUI |
#define | SIATXRX_21041P2_AUI 0x0000f7fd |
#define | SIAGEN_21041P2_AUI SIAGEN_21041_AUI |
#define | SIACONN_21041_BNC 0x0000ef09 |
#define | SIATXRX_21041_BNC 0x0000f73d |
#define | SIAGEN_21041_BNC 0x00000006 |
#define | SIACONN_21041P2_BNC SIACONN_21041_BNC |
#define | SIATXRX_21041P2_BNC 0x0000f7fd |
#define | SIAGEN_21041P2_BNC SIAGEN_21041_BNC |
#define | SIACONN_21142_10BASET 0x00000001 |
#define | SIATXRX_21142_10BASET 0x00007f3f |
#define | SIAGEN_21142_10BASET 0x00000008 |
#define | SIACONN_21142_10BASET_FDX 0x00000001 |
#define | SIATXRX_21142_10BASET_FDX 0x00007f3d |
#define | SIAGEN_21142_10BASET_FDX 0x00000008 |
#define | SIACONN_21142_AUI 0x00000009 |
#define | SIATXRX_21142_AUI 0x00004705 |
#define | SIAGEN_21142_AUI 0x0000000e |
#define | SIACONN_21142_BNC 0x00000009 |
#define | SIATXRX_21142_BNC 0x00004705 |
#define | SIAGEN_21142_BNC 0x00000006 |
#define | CSR_PNIC_ENDEC 0x78 |
#define | PNIC_ENDEC_JDIS 0x00000001 /* jabber disable */ |
#define | CSR_PNIC_SROMPWR 0x90 |
#define | PNIC_SROMPWR_MRLE 0x00000001 /* Memory-Read-Line enable */ |
#define | PNIC_SROMPWR_CB |
#define | CSR_PNIC_SROMCTL 0x98 |
#define | PNIC_SROMCTL_addr 0x0000003f /* mask of address bits */ |
#define | PNIC_SROMCTL_READ 0x00000600 /* read command */ |
#define | CSR_PNIC_MII 0xa0 |
#define | PNIC_MII_DATA 0x0000ffff /* mask of data bits */ |
#define | PNIC_MII_REG 0x007c0000 /* register mask */ |
#define | PNIC_MII_REGSHIFT 18 |
#define | PNIC_MII_PHY 0x0f800000 /* phy mask */ |
#define | PNIC_MII_PHYSHIFT 23 |
#define | PNIC_MII_OPCODE 0x30000000 /* opcode mask */ |
#define | PNIC_MII_RESERVED |
#define | PNIC_MII_MBO 0x40000000 /* must be one */ |
#define | PNIC_MII_BUSY 0x80000000 /* MII is busy */ |
#define | PNIC_MII_WRITE 0x10000000 /* write PHY command */ |
#define | PNIC_MII_READ 0x20000000 /* read PHY command */ |
#define | CSR_PNIC_NWAY 0xb8 |
#define | PNIC_NWAY_RS 0x00000001 /* reset NWay block */ |
#define | PNIC_NWAY_PD 0x00000002 /* power down NWay block */ |
#define | PNIC_NWAY_BX 0x00000004 /* bypass transceiver */ |
#define | PNIC_NWAY_LC 0x00000008 /* AUI low current mode */ |
#define | PNIC_NWAY_UV 0x00000010 /* low squelch voltage */ |
#define | PNIC_NWAY_DX 0x00000020 /* disable TP pol. correction */ |
#define | PNIC_NWAY_TW 0x00000040 /* select TP (0 == AUI) */ |
#define | PNIC_NWAY_AF |
#define | PNIC_NWAY_FD 0x00000100 /* full duplex mode */ |
#define | PNIC_NWAY_DL |
#define | PNIC_NWAY_DM 0x00000400 /* disable AUI/TP autodetect */ |
#define | PNIC_NWAY_100 0x00000800 /* 1 == 100mbps, 0 == 10mbps */ |
#define | PNIC_NWAY_NW 0x00001000 /* enable NWay block */ |
#define | PNIC_NWAY_CAP10T 0x00002000 /* adv. 10baseT */ |
#define | PNIC_NWAY_CAP10TFDX 0x00004000 /* adv. 10baseT-FDX */ |
#define | PNIC_NWAY_CAP100TXFDX 0x00008000 /* adv. 100baseTX-FDX */ |
#define | PNIC_NWAY_CAP100TX 0x00010000 /* adv. 100baseTX */ |
#define | PNIC_NWAY_CAP100T4 0x00020000 /* adv. 100base-T4 */ |
#define | PNIC_NWAY_RN 0x02000000 /* re-negotiate enable */ |
#define | PNIC_NWAY_RF 0x04000000 /* remote fault detected */ |
#define | PNIC_NWAY_LPAR10T 0x08000000 /* link part. 10baseT */ |
#define | PNIC_NWAY_LPAR10TFDX 0x10000000 /* link part. 10baseT-FDX */ |
#define | PNIC_NWAY_LPAR100TXFDX 0x20000000 /* link part. 100baseTX-FDX */ |
#define | PNIC_NWAY_LPAR100TX 0x40000000 /* link part. 100baseTX */ |
#define | PNIC_NWAY_LPAR100T4 0x80000000 /* link part. 100base-T4 */ |
#define | PNIC_NWAY_LPAR_MASK 0xf8000000 |
#define | CSR_PMAC_10TSTAT TULIP_CSR12 |
#define | PMAC_SIASTAT_MASK |
#define | CSR_PMAC_NWAYRESET TULIP_CSR13 |
#define | PMAC_SIACONN_MASK (SIACONN_SRL) |
#define | PMAC_NWAYRESET_100TXRESET 0x00000002 /* 100base PMD reset */ |
#define | CSR_PMAC_10TCTL TULIP_CSR14 |
#define | PMAC_SIATXRX_MASK |
#define | PMAC_SIAGEN_MASK |
#define | CSR_PMAC_TOR TULIP_CSR16 |
#define | PMAC_TOR_98713 0x0F370000 |
#define | PMAC_TOR_98715 0x0B3C0000 |
#define | CSR_PMAC_NWAYSTAT TULIP_CSR20 |
#define | PMAC_NWAYSTAT_DS120 0x00000200 /* Auto-compensation circ */ |
#define | PMAC_NWAYSTAT_DS130 0x00004000 /* Auto-compensation circ */ |
#define | PMAC_NWAYSTAT_EQTEST 0x00001000 /* EQ test */ |
#define | PMAC_NWAYSTAT_PCITEST 0x00010000 /* PCI test */ |
#define | PMAC_NWAYSTAT_10TXH 0x08000000 /* 10t accepted */ |
#define | PMAC_NWAYSTAT_10TXF 0x10000000 /* 10t-fdx accepted */ |
#define | PMAC_NWAYSTAT_100TXH 0x20000000 /* 100tx accepted */ |
#define | PMAC_NWAYSTAT_100TXF 0x40000000 /* 100tx-fdx accepted */ |
#define | PMAC_NWAYSTAT_T4 0x80000000 /* 100t4 accepted */ |
#define | CSR_PNICII_FLOWCTL TULIP_CSR21 |
#define | PNICII_FLOWCTL_WKFCATEN |
#define | PNICII_FLOWCTL_NFCE |
#define | PNICII_FLOWCTL_FCTH0 0x00000040 /* rx flow control thresh 0 */ |
#define | PNICII_FLOWCTL_FCTH1 0x00000080 /* rx flow control thresh 1 */ |
#define | PNICII_FLOWCTL_REJECTFC 0x00000100 /* abort rx flow control */ |
#define | PNICII_FLOWCTL_STOPTX 0x00000200 /* tx flow stopped */ |
#define | PNICII_FLOWCTL_RUFCEN |
#define | PNICII_FLOWCTL_RXFCEN 0x00000800 /* rx flow control enable */ |
#define | PNICII_FLOWCTL_TXFCEN 0x00001000 /* tx flow control enable */ |
#define | PNICII_FLOWCTL_RESTOP 0x00002000 /* restop mode */ |
#define | PNICII_FLOWCTL_RESTART 0x00004000 /* restart mode */ |
#define | PNICII_FLOWCTL_TEST 0x00008000 /* test flow control timer */ |
#define | PNICII_FLOWCTL_TMVAL |
#define | PNICII_FLOWCTL_TH_512 (PNICII_FLOWCTL_FCTH0|PNICII_FLOWCTL_FCTH1) |
#define | PNICII_FLOWCTL_TH_256 (PNICII_FLOWCTL_FCTH1) |
#define | PNICII_FLOWCTL_TH_128 (PNICII_FLOWCTL_FCTH0) |
#define | PNICII_FLOWCTL_TH_OVFLW (0) |
#define | CSR_PNICII_MACID0 TULIP_CSR22 |
#define | PNICII_MACID_1 0 /* shift */ |
#define | PNICII_MACID_0 8 /* shift */ |
#define | PNICII_MACID_3 16 /* shift */ |
#define | PNICII_MACID_2 24 /* shift */ |
#define | PNICII_MACID_5 0 /* shift */ |
#define | PNICII_MACID_4 8 /* shift */ |
#define | PNICII_MAGID_5 16 /* shift */ |
#define | PNICII_MAGIC_4 24 /* shift */ |
#define | PNICII_MAGID_1 0 /* shift */ |
#define | PNICII_MAGID_0 8 /* shift */ |
#define | PNICII_MAGID_3 16 /* shift */ |
#define | PNICII_MAGID_2 24 /* shift */ |
#define | CSR_PNICII_MASK0 TULIP_CSR25 |
#define | CSR_PNICII_MASK1 TULIP_CSR26 |
#define | CSR_PNICII_MASK2 TULIP_CSR27 |
#define | CSR_PNICII_MASK3 TULIP_CSR28 |
#define | CSR_PNICII_FILOFF TULIP_CSR29 |
#define | PNICII_FILOFF_PAT0 0x0000007f /* pattern 0 offset */ |
#define | PNICII_FILOFF_EN0 0x00000080 /* enable pattern 0 */ |
#define | PNICII_FILOFF_PAT1 0x00007f00 /* pattern 1 offset */ |
#define | PNICII_FILOFF_EN1 0x00008000 /* enable pattern 1 */ |
#define | PNICII_FILOFF_PAT2 0x007f0000 /* pattern 2 offset */ |
#define | PNICII_FILOFF_EN2 0x00800000 /* enable pattern 2 */ |
#define | PNICII_FILOFF_PAT3 0x7f000000 /* pattern 3 offset */ |
#define | PNICII_FILOFF_EN3 0x80000000 /* enable pattern 3 */ |
#define | CSR_PNICII_FIL01 TULIP_CSR30 |
#define | PNICII_FIL01_CRC0 0x0000ffff /* CRC-16 of pattern 0 */ |
#define | PNICII_FIL01_CRC1 0xffff0000 /* CRC-16 of pattern 1 */ |
#define | CSR_PNICII_FIL23 TULIP_CSR31 |
#define | PNICII_FIL23_CRC2 0x0000ffff /* CRC-16 of pattern 2 */ |
#define | PNICII_FIL23_CRC3 0xffff0000 /* CRC-16 of pattern 3 */ |
#define | CSR_WINB_CRDAR TULIP_CSR12 |
#define | CSR_WINB_CCRBAR TULIP_CSR13 |
#define | CSR_WINB_CMA0 TULIP_CSR14 |
#define | CSR_WINB_CMA1 TULIP_CSR15 |
#define | CSR_WINB_CPA0 TULIP_CSR16 |
#define | CSR_WINB_CPA1 TULIP_CSR17 |
#define | CSR_WINB_CBRCR TULIP_CSR18 |
#define | WINB_CBRCR_NONE 0x00000000 /* no boot rom */ |
#define | WINB_CBRCR_8K 0x00000002 /* 8k */ |
#define | WINB_CBRCR_16K 0x00000003 /* 16k */ |
#define | WINB_CBRCR_32K 0x00000004 /* 32k */ |
#define | WINB_CBRCR_64K 0x00000005 /* 64k */ |
#define | WINB_CBRCR_128K 0x00000006 /* 128k */ |
#define | WINB_CBRCR_256K 0x00000007 |
#define | CSR_WINB_CTDAR TULIP_CSR19 |
#define | CSR_WINB_CTBAR TULIP_CSR20 |
#define | CSR_ADM_WCSR 0x68 |
#define | ADM_WCSR_LSC 0x00000001 /* link status changed */ |
#define | ADM_WCSR_MPR 0x00000002 /* magic packet received */ |
#define | ADM_WCSR_WFR 0x00000004 /* wake up frame received */ |
#define | ADM_WCSR_LSCE 0x00000100 /* link status changed en. */ |
#define | ADM_WCSR_MPRE 0x00000200 /* magic packet receive en. */ |
#define | ADM_WCSR_WFRE 0x00000400 /* wake up frame receive en. */ |
#define | ADM_WCSR_LINKON 0x00010000 /* link-on detect en. */ |
#define | ADM_WCSR_LINKOFF 0x00020000 /* link-off detect en. */ |
#define | ADM_WCSR_WP5E 0x02000000 /* wake up pat. 5 en. */ |
#define | ADM_WCSR_WP4E 0x04000000 /* wake up pat. 4 en. */ |
#define | ADM_WCSR_WP3E 0x08000000 /* wake up pat. 3 en. */ |
#define | ADM_WCSR_WP2E 0x10000000 /* wake up pat. 2 en. */ |
#define | ADM_WCSR_WP1E 0x20000000 /* wake up pat. 1 en. */ |
#define | ADM_WCSR_CRCT |
#define | CSR_ADM_WPDR 0x70 |
#define | CSR_ADM_ASR 0x80 |
#define | ADM_ASR_AAISS 0x00080000 /* added abnormal int. sum. */ |
#define | ADM_ASR_ANISS 0x00010000 /* added normal int. sum. */ |
#define | ADM_ASR_BET 0x03800000 /* bus error type */ |
#define | ADM_ASR_BET_PERR 0x00000000 /* parity error */ |
#define | ADM_ASR_BET_MABT 0x00800000 /* master abort */ |
#define | ADM_ASR_BET_TABT 0x01000000 /* target abort */ |
#define | ADM_ASR_PFR 0x04000000 /* PAUSE frame received */ |
#define | ADM_ASR_TDIS 0x10000000 /* transmit def. int. status */ |
#define | ADM_ASR_XIS 0x20000000 /* xcvr int. status */ |
#define | ADM_ASR_REIS 0x40000000 /* receive early int. status */ |
#define | ADM_ASR_TEIS 0x80000000 /* transmit early int. status */ |
#define | CSR_ADM_AIE 0x84 |
#define | CSR_ADM_CR 0x88 |
#define | ADM_CR_ATUR 0x00000001 /* auto. tx underrun recover */ |
#define | ADM_CR_SINT 0x00000002 /* software interrupt */ |
#define | ADM_CR_DRT 0x0000000c /* drain receive threshold */ |
#define | ADM_CR_DRT_8LW 0x00000000 /* 8 longwords */ |
#define | ADM_CR_DRT_16LW 0x00000004 /* 16 longwords */ |
#define | ADM_CR_DRT_SF 0x00000008 /* store-and-forward */ |
#define | ADM_CR_RTE 0x00000010 /* receive threshold enable */ |
#define | ADM_CR_PAUSE 0x00000020 /* enable PAUSE function */ |
#define | ADM_CR_RWP |
#define | ADM_CR_WOL 0x00040000 /* wake-on-lan enable */ |
#define | ADM_CR_PM 0x00080000 /* power management enable */ |
#define | ADM_CR_RFS 0x00600000 /* Receive FIFO size */ |
#define | ADM_CR_RFS_1K 0x00600000 /* 1K FIFO */ |
#define | ADM_CR_RFS_2K 0x00400000 /* 2K FIFO */ |
#define | ADM_CR_LEDMODE 0x00800000 /* LED mode */ |
#define | ADM_CR_AUXCL 0x30000000 /* aux current load */ |
#define | ADM_CR_D3CS 0x80000000 /* D3 cold wake up enable */ |
#define | CSR_ADM_PCIC 0x8c |
#define | ADM_PCIC_DWCNT |
#define | ADM_PCIC_CLKCNT |
#define | CSR_ADM_PMCSR 0x90 |
#define | CSR_ADM_TXBR 0x9c |
#define | ADM_TXBR_TTO 0x00000fff /* transmit timeout */ |
#define | ADM_TXBR_TBCNT 0x001f0000 /* transmit burst count */ |
#define | CSR_ADM_FROM 0xa0 |
#define | ADM_FROM_DATA 0x000000ff /* data to/from Flash */ |
#define | ADM_FROM_ADDR 0x01ffff00 /* Flash address */ |
#define | ADM_FROM_ADDR_SHIFT 8 |
#define | ADM_FROM_WEN 0x04000000 /* write enable */ |
#define | ADM_FROM_REN 0x08000000 /* read enable */ |
#define | ADM_FROM_bra16on |
#define | CSR_ADM_PAR0 0xa4 |
#define | CSR_ADM_PAR1 0xa8 |
#define | CSR_ADM_MAR0 0xac |
#define | CSR_ADM_MAR1 0xb0 |
#define | CSR_ADM_BMCR 0xb4 |
#define | CSR_ADM_BMSR 0xb8 |
#define | CSR_ADM_PHYIDR1 0xbc |
#define | CSR_ADM_PHYIDR2 0xc0 |
#define | CSR_ADM_ANAR 0xc4 |
#define | CSR_ADM_ANLPAR 0xc8 |
#define | CSR_ADM_ANER 0xcc |
#define | CSR_ADM_XMC 0xd0 |
#define | ADM_XMC_LD |
#define | CSR_ADM_XCIIS 0xd4 |
#define | ADM_XCIIS_REF 0x0001 /* 64 error packets received */ |
#define | ADM_XCIIS_ANPR 0x0002 /* autoneg page received */ |
#define | ADM_XCIIS_PDF 0x0004 /* parallel detection fault */ |
#define | ADM_XCIIS_ANAR 0x0008 /* autoneg ACK */ |
#define | ADM_XCIIS_LS 0x0010 /* link status (1 == fail) */ |
#define | ADM_XCIIS_RFD 0x0020 /* remote fault */ |
#define | ADM_XCIIS_ANC 0x0040 /* autoneg completed */ |
#define | ADM_XCIIS_PAUSE 0x0080 /* PAUSE enabled */ |
#define | ADM_XCIIS_DUPLEX 0x0100 /* full duplex */ |
#define | ADM_XCIIS_SPEED 0x0200 /* 100Mb/s */ |
#define | CSR_ADM_XIE 0xd8 |
#define | CSR_ADM_100CTR 0xdc |
#define | ADM_100CTR_DISCRM 0x0001 /* disable scrambler */ |
#define | ADM_100CTR_DISMLT 0x0002 /* disable MLT3 ENDEC */ |
#define | ADM_100CTR_CMODE 0x001c /* current operating mode */ |
#define | ADM_100CTR_CMODE_AUTO 0x0000 /* in autoneg */ |
#define | ADM_100CTR_CMODE_10 0x0004 /* 10baseT */ |
#define | ADM_100CTR_CMODE_100 0x0008 /* 100baseTX */ |
#define | ADM_100CTR_CMODE_10FD 0x0014 /* 10baseT-FDX */ |
#define | ADM_100CTR_CMODE_100FD 0x0018 /* 100baseTX-FDX */ |
#define | ADM_100CTR_CMODE_ISO 0x001c /* isolated */ |
#define | ADM_100CTR_ISOTX 0x0020 /* transmit isolation */ |
#define | ADM_100CTR_ENRZI 0x0080 /* enable NRZ <> NRZI conv. */ |
#define | ADM_100CTR_ENDCR 0x0100 /* enable DC restoration */ |
#define | ADM_100CTR_ENRLB 0x0200 /* enable remote loopback */ |
#define | ADM_100CTR_RXVPP |
#define | ADM_100CTR_ANC 0x1000 /* autoneg completed */ |
#define | ADM_100CTR_DISRER 0x2000 /* disable Rx error counter */ |
#define | CSR_ADM983_OPMODE 0xfc |
#define | ADM983_OPMODE_SPEED 0x80000000 /* 1 == 100, 0 == 10 */ |
#define | ADM983_OPMODE_FD 0x40000000 /* 1 == fd, 0 == hd */ |
#define | ADM983_OPMODE_LINK 0x20000000 /* 1 == link, 0 == no link */ |
#define | ADM983_OPMODE_EERLOD 0x04000000 /* reload from EEPROM */ |
#define | ADM983_OPMODE_SingleChip 0x00000007 /* single-chip mode */ |
#define | ADM983_OPMODE_MacOnly 0x00000004 /* MAC-only mode */ |
#define | CSR_X3201_PMR TULIP_CSR16 |
#define | X3201_PMR_EDINT 0x0000000f /* energy detect interval */ |
#define | X3201_PMR_EDEN 0x00000100 /* energy detect enable */ |
#define | X3201_PMR_MPEN 0x00000200 /* magic packet enable */ |
#define | X3201_PMR_WOLEN 0x00000400 /* Wake On Lan enable */ |
#define | X3201_PMR_PMGP0EN 0x00001000 /* GP0 change enable */ |
#define | X3201_PMR_PMLCEN 0x00002000 /* link change enable */ |
#define | X3201_PMR_WOLTMEN 0x00008000 /* WOL template mem enable */ |
#define | X3201_PMR_EP 0x00010000 /* energy present */ |
#define | X3201_PMR_LP 0x00200000 /* link present */ |
#define | X3201_PMR_EDES 0x01000000 /* ED event status */ |
#define | X3201_PMR_MPES 0x02000000 /* MP event status */ |
#define | X3201_PMR_WOLES 0x04000000 /* WOL event status */ |
#define | X3201_PMR_WOLPS 0x08000000 /* WOL process status */ |
#define | X3201_PMR_GP0ES 0x10000000 /* GP0 event status */ |
#define | X3201_PMR_LCES 0x20000000 /* LC event status */ |
#define | CSR_DM_PHYSTAT TULIP_CSR12 |
#define | DM_PHYSTAT_10 0x00000001 /* 10Mb/s */ |
#define | DM_PHYSTAT_100 0x00000002 /* 100Mb/s */ |
#define | DM_PHYSTAT_FDX 0x00000004 /* full-duplex */ |
#define | DM_PHYSTAT_LINK 0x00000008 /* link up */ |
#define | DM_PHYSTAT_RXLOCK 0x00000010 /* RX-lock */ |
#define | DM_PHYSTAT_SIGNAL 0x00000020 /* signal detection */ |
#define | DM_PHYSTAT_UTPSIG 0x00000040 /* UTP SIG */ |
#define | DM_PHYSTAT_GPED 0x00000080 /* general PHY reset control */ |
#define | DM_PHYSTAT_GEPC 0x00000100 /* GPED bits control */ |
#define | CSR_DM_SFAR TULIP_CSR13 |
#define | CSR_DM_SFDR TULIP_CSR14 |
#define | CSR_AX_FILTIDX TULIP_CSR13 |
#define | CSR_AX_FILTDATA TULIP_CSR14 |
#define | AX_FILTIDX_PAR0 0x00000000 |
#define | AX_FILTIDX_PAR1 0x00000001 |
#define | AX_FILTIDX_MAR0 0x00000002 |
#define | AX_FILTIDX_MAR1 0x00000003 |
#define _DEV_IC_TULIPREG_H_ |
Definition at line 45 of file tulipreg.h.
#define ADM983_OPMODE_EERLOD 0x04000000 /* reload from EEPROM */ |
Definition at line 1506 of file tulipreg.h.
#define ADM983_OPMODE_FD 0x40000000 /* 1 == fd, 0 == hd */ |
Definition at line 1504 of file tulipreg.h.
#define ADM983_OPMODE_LINK 0x20000000 /* 1 == link, 0 == no link */ |
Definition at line 1505 of file tulipreg.h.
#define ADM983_OPMODE_MacOnly 0x00000004 /* MAC-only mode */ |
Definition at line 1508 of file tulipreg.h.
#define ADM983_OPMODE_SingleChip 0x00000007 /* single-chip mode */ |
Definition at line 1507 of file tulipreg.h.
#define ADM983_OPMODE_SPEED 0x80000000 /* 1 == 100, 0 == 10 */ |
Definition at line 1503 of file tulipreg.h.
#define ADM_100CTR_ANC 0x1000 /* autoneg completed */ |
Definition at line 1498 of file tulipreg.h.
#define ADM_100CTR_CMODE 0x001c /* current operating mode */ |
Definition at line 1482 of file tulipreg.h.
#define ADM_100CTR_CMODE_10 0x0004 /* 10baseT */ |
Definition at line 1484 of file tulipreg.h.
#define ADM_100CTR_CMODE_100 0x0008 /* 100baseTX */ |
Definition at line 1485 of file tulipreg.h.
#define ADM_100CTR_CMODE_100FD 0x0018 /* 100baseTX-FDX */ |
Definition at line 1489 of file tulipreg.h.
#define ADM_100CTR_CMODE_10FD 0x0014 /* 10baseT-FDX */ |
Definition at line 1488 of file tulipreg.h.
#define ADM_100CTR_CMODE_AUTO 0x0000 /* in autoneg */ |
Definition at line 1483 of file tulipreg.h.
#define ADM_100CTR_CMODE_ISO 0x001c /* isolated */ |
Definition at line 1490 of file tulipreg.h.
#define ADM_100CTR_DISCRM 0x0001 /* disable scrambler */ |
Definition at line 1480 of file tulipreg.h.
#define ADM_100CTR_DISMLT 0x0002 /* disable MLT3 ENDEC */ |
Definition at line 1481 of file tulipreg.h.
#define ADM_100CTR_DISRER 0x2000 /* disable Rx error counter */ |
Definition at line 1499 of file tulipreg.h.
#define ADM_100CTR_ENDCR 0x0100 /* enable DC restoration */ |
Definition at line 1493 of file tulipreg.h.
#define ADM_100CTR_ENRLB 0x0200 /* enable remote loopback */ |
Definition at line 1494 of file tulipreg.h.
#define ADM_100CTR_ENRZI 0x0080 /* enable NRZ <> NRZI conv. */ |
Definition at line 1492 of file tulipreg.h.
#define ADM_100CTR_ISOTX 0x0020 /* transmit isolation */ |
Definition at line 1491 of file tulipreg.h.
#define ADM_100CTR_RXVPP |
Definition at line 1495 of file tulipreg.h.
#define ADM_ASR_AAISS 0x00080000 /* added abnormal int. sum. */ |
Definition at line 1350 of file tulipreg.h.
#define ADM_ASR_ANISS 0x00010000 /* added normal int. sum. */ |
Definition at line 1351 of file tulipreg.h.
#define ADM_ASR_BET 0x03800000 /* bus error type */ |
Definition at line 1354 of file tulipreg.h.
#define ADM_ASR_BET_MABT 0x00800000 /* master abort */ |
Definition at line 1356 of file tulipreg.h.
#define ADM_ASR_BET_PERR 0x00000000 /* parity error */ |
Definition at line 1355 of file tulipreg.h.
#define ADM_ASR_BET_TABT 0x01000000 /* target abort */ |
Definition at line 1357 of file tulipreg.h.
#define ADM_ASR_PFR 0x04000000 /* PAUSE frame received */ |
Definition at line 1358 of file tulipreg.h.
#define ADM_ASR_REIS 0x40000000 /* receive early int. status */ |
Definition at line 1361 of file tulipreg.h.
#define ADM_ASR_TDIS 0x10000000 /* transmit def. int. status */ |
Definition at line 1359 of file tulipreg.h.
#define ADM_ASR_TEIS 0x80000000 /* transmit early int. status */ |
Definition at line 1362 of file tulipreg.h.
#define ADM_ASR_XIS 0x20000000 /* xcvr int. status */ |
Definition at line 1360 of file tulipreg.h.
#define ADM_CR_ATUR 0x00000001 /* auto. tx underrun recover */ |
Definition at line 1372 of file tulipreg.h.
#define ADM_CR_AUXCL 0x30000000 /* aux current load */ |
Definition at line 1389 of file tulipreg.h.
#define ADM_CR_D3CS 0x80000000 /* D3 cold wake up enable */ |
Definition at line 1390 of file tulipreg.h.
#define ADM_CR_DRT 0x0000000c /* drain receive threshold */ |
Definition at line 1374 of file tulipreg.h.
#define ADM_CR_DRT_16LW 0x00000004 /* 16 longwords */ |
Definition at line 1376 of file tulipreg.h.
#define ADM_CR_DRT_8LW 0x00000000 /* 8 longwords */ |
Definition at line 1375 of file tulipreg.h.
#define ADM_CR_DRT_SF 0x00000008 /* store-and-forward */ |
Definition at line 1377 of file tulipreg.h.
#define ADM_CR_LEDMODE 0x00800000 /* LED mode */ |
Definition at line 1388 of file tulipreg.h.
#define ADM_CR_PAUSE 0x00000020 /* enable PAUSE function */ |
Definition at line 1379 of file tulipreg.h.
#define ADM_CR_PM 0x00080000 /* power management enable */ |
Definition at line 1384 of file tulipreg.h.
#define ADM_CR_RFS 0x00600000 /* Receive FIFO size */ |
Definition at line 1385 of file tulipreg.h.
#define ADM_CR_RFS_1K 0x00600000 /* 1K FIFO */ |
Definition at line 1386 of file tulipreg.h.
#define ADM_CR_RFS_2K 0x00400000 /* 2K FIFO */ |
Definition at line 1387 of file tulipreg.h.
#define ADM_CR_RTE 0x00000010 /* receive threshold enable */ |
Definition at line 1378 of file tulipreg.h.
#define ADM_CR_RWP |
Definition at line 1380 of file tulipreg.h.
#define ADM_CR_SINT 0x00000002 /* software interrupt */ |
Definition at line 1373 of file tulipreg.h.
#define ADM_CR_WOL 0x00040000 /* wake-on-lan enable */ |
Definition at line 1383 of file tulipreg.h.
#define ADM_FROM_ADDR 0x01ffff00 /* Flash address */ |
Definition at line 1419 of file tulipreg.h.
#define ADM_FROM_ADDR_SHIFT 8 |
Definition at line 1420 of file tulipreg.h.
#define ADM_FROM_bra16on |
Definition at line 1423 of file tulipreg.h.
#define ADM_FROM_DATA 0x000000ff /* data to/from Flash */ |
Definition at line 1418 of file tulipreg.h.
#define ADM_FROM_REN 0x08000000 /* read enable */ |
Definition at line 1422 of file tulipreg.h.
#define ADM_FROM_WEN 0x04000000 /* write enable */ |
Definition at line 1421 of file tulipreg.h.
#define ADM_PCIC_CLKCNT |
Definition at line 1398 of file tulipreg.h.
#define ADM_PCIC_DWCNT |
Definition at line 1395 of file tulipreg.h.
#define ADM_TXBR_TBCNT 0x001f0000 /* transmit burst count */ |
Definition at line 1413 of file tulipreg.h.
#define ADM_TXBR_TTO 0x00000fff /* transmit timeout */ |
Definition at line 1412 of file tulipreg.h.
#define ADM_WCSR_CRCT |
Definition at line 1327 of file tulipreg.h.
#define ADM_WCSR_LINKOFF 0x00020000 /* link-off detect en. */ |
Definition at line 1321 of file tulipreg.h.
#define ADM_WCSR_LINKON 0x00010000 /* link-on detect en. */ |
Definition at line 1320 of file tulipreg.h.
#define ADM_WCSR_LSC 0x00000001 /* link status changed */ |
Definition at line 1314 of file tulipreg.h.
#define ADM_WCSR_LSCE 0x00000100 /* link status changed en. */ |
Definition at line 1317 of file tulipreg.h.
#define ADM_WCSR_MPR 0x00000002 /* magic packet received */ |
Definition at line 1315 of file tulipreg.h.
#define ADM_WCSR_MPRE 0x00000200 /* magic packet receive en. */ |
Definition at line 1318 of file tulipreg.h.
#define ADM_WCSR_WFR 0x00000004 /* wake up frame received */ |
Definition at line 1316 of file tulipreg.h.
#define ADM_WCSR_WFRE 0x00000400 /* wake up frame receive en. */ |
Definition at line 1319 of file tulipreg.h.
#define ADM_WCSR_WP1E 0x20000000 /* wake up pat. 1 en. */ |
Definition at line 1326 of file tulipreg.h.
#define ADM_WCSR_WP2E 0x10000000 /* wake up pat. 2 en. */ |
Definition at line 1325 of file tulipreg.h.
#define ADM_WCSR_WP3E 0x08000000 /* wake up pat. 3 en. */ |
Definition at line 1324 of file tulipreg.h.
#define ADM_WCSR_WP4E 0x04000000 /* wake up pat. 4 en. */ |
Definition at line 1323 of file tulipreg.h.
#define ADM_WCSR_WP5E 0x02000000 /* wake up pat. 5 en. */ |
Definition at line 1322 of file tulipreg.h.
#define ADM_XCIIS_ANAR 0x0008 /* autoneg ACK */ |
Definition at line 1464 of file tulipreg.h.
#define ADM_XCIIS_ANC 0x0040 /* autoneg completed */ |
Definition at line 1467 of file tulipreg.h.
#define ADM_XCIIS_ANPR 0x0002 /* autoneg page received */ |
Definition at line 1462 of file tulipreg.h.
#define ADM_XCIIS_DUPLEX 0x0100 /* full duplex */ |
Definition at line 1469 of file tulipreg.h.
#define ADM_XCIIS_LS 0x0010 /* link status (1 == fail) */ |
Definition at line 1465 of file tulipreg.h.
#define ADM_XCIIS_PAUSE 0x0080 /* PAUSE enabled */ |
Definition at line 1468 of file tulipreg.h.
#define ADM_XCIIS_PDF 0x0004 /* parallel detection fault */ |
Definition at line 1463 of file tulipreg.h.
#define ADM_XCIIS_REF 0x0001 /* 64 error packets received */ |
Definition at line 1461 of file tulipreg.h.
#define ADM_XCIIS_RFD 0x0020 /* remote fault */ |
Definition at line 1466 of file tulipreg.h.
#define ADM_XCIIS_SPEED 0x0200 /* 100Mb/s */ |
Definition at line 1470 of file tulipreg.h.
#define ADM_XMC_LD |
Definition at line 1455 of file tulipreg.h.
#define AX_FILTIDX_MAR0 0x00000002 |
Definition at line 1570 of file tulipreg.h.
#define AX_FILTIDX_MAR1 0x00000003 |
Definition at line 1571 of file tulipreg.h.
#define AX_FILTIDX_PAR0 0x00000000 |
Definition at line 1568 of file tulipreg.h.
#define AX_FILTIDX_PAR1 0x00000001 |
Definition at line 1569 of file tulipreg.h.
#define BUSMODE_BAR 0x00000002 /* bus arbitration */ |
Definition at line 429 of file tulipreg.h.
#define BUSMODE_BLE 0x00000080 /* big endian */ |
Definition at line 431 of file tulipreg.h.
#define BUSMODE_CAL_16LW 0x00008000 /* 16 longwords */ |
Definition at line 443 of file tulipreg.h.
#define BUSMODE_CAL_32LW 0x0000c000 /* 32 longwords */ |
Definition at line 444 of file tulipreg.h.
#define BUSMODE_CAL_8LW 0x00004000 /* 8 longwords */ |
Definition at line 442 of file tulipreg.h.
#define BUSMODE_CAL_NONE 0x00000000 /* no alignment */ |
Definition at line 441 of file tulipreg.h.
#define BUSMODE_DAS 0x00010000 /* diagnostic address space */ |
Definition at line 445 of file tulipreg.h.
#define BUSMODE_DBO 0x00100000 /* desc-only b/e (21041+) */ |
Definition at line 463 of file tulipreg.h.
#define BUSMODE_DSL 0x0000007c /* descriptor skip length */ |
Definition at line 430 of file tulipreg.h.
#define BUSMODE_PBL_16LW 0x00001000 /* 16 longwords */ |
Definition at line 438 of file tulipreg.h.
#define BUSMODE_PBL_1LW 0x00000100 /* 1 longword */ |
Definition at line 434 of file tulipreg.h.
#define BUSMODE_PBL_2LW 0x00000200 /* 2 longwords */ |
Definition at line 435 of file tulipreg.h.
#define BUSMODE_PBL_32LW 0x00002000 /* 32 longwords */ |
Definition at line 439 of file tulipreg.h.
#define BUSMODE_PBL_4LW 0x00000400 /* 4 longwords */ |
Definition at line 436 of file tulipreg.h.
#define BUSMODE_PBL_8LW 0x00000800 /* 8 longwords */ |
Definition at line 437 of file tulipreg.h.
#define BUSMODE_PBL_DEFAULT 0x00000000 /* default value */ |
Definition at line 433 of file tulipreg.h.
#define BUSMODE_PNIC_MBO 0x04000000 /* magic `must be one' bit */ |
Definition at line 468 of file tulipreg.h.
#define BUSMODE_RLE 0x00800000 /* rd/line enab (21140+) */ |
Definition at line 466 of file tulipreg.h.
#define BUSMODE_RME 0x00200000 /* rd/mult enab (21140+) */ |
Definition at line 464 of file tulipreg.h.
#define BUSMODE_SWR 0x00000001 /* software reset */ |
Definition at line 428 of file tulipreg.h.
Referenced by DEVICE_ACCESS().
#define BUSMODE_TAP_102_4us 0x000e0000 /* 102.4 uS (21041+) */ |
Definition at line 462 of file tulipreg.h.
#define BUSMODE_TAP_12_8us 0x00080000 /* 12.8 uS (21041+) */ |
Definition at line 459 of file tulipreg.h.
#define BUSMODE_TAP_1_6ms 0x00060000 /* 1.6 mS */ |
Definition at line 458 of file tulipreg.h.
#define BUSMODE_TAP_200us 0x00020000 /* 200 uS */ |
Definition at line 456 of file tulipreg.h.
#define BUSMODE_TAP_25_6us 0x000a0000 /* 25.6 uS (21041+) */ |
Definition at line 460 of file tulipreg.h.
#define BUSMODE_TAP_51_2us 0x000c0000 /* 51.2 uS (21041+) */ |
Definition at line 461 of file tulipreg.h.
#define BUSMODE_TAP_800us 0x00040000 /* 400 uS */ |
Definition at line 457 of file tulipreg.h.
#define BUSMODE_TAP_NONE 0x00000000 /* no auto-polling */ |
Definition at line 455 of file tulipreg.h.
#define BUSMODE_WINB_WAIT 0x00200000 /* wait state insertion */ |
Definition at line 465 of file tulipreg.h.
#define BUSMODE_WLE 0x01000000 /* wt/line enab (21140+) */ |
Definition at line 467 of file tulipreg.h.
#define CSR_21040_FDX TULIP_CSR11 |
Definition at line 928 of file tulipreg.h.
#define CSR_ADM983_OPMODE 0xfc |
Definition at line 1502 of file tulipreg.h.
#define CSR_ADM_100CTR 0xdc |
Definition at line 1479 of file tulipreg.h.
#define CSR_ADM_AIE 0x84 |
Definition at line 1366 of file tulipreg.h.
#define CSR_ADM_ANAR 0xc4 |
Definition at line 1449 of file tulipreg.h.
#define CSR_ADM_ANER 0xcc |
Definition at line 1451 of file tulipreg.h.
#define CSR_ADM_ANLPAR 0xc8 |
Definition at line 1450 of file tulipreg.h.
#define CSR_ADM_ASR 0x80 |
Definition at line 1348 of file tulipreg.h.
#define CSR_ADM_BMCR 0xb4 |
Definition at line 1445 of file tulipreg.h.
#define CSR_ADM_BMSR 0xb8 |
Definition at line 1446 of file tulipreg.h.
#define CSR_ADM_CR 0x88 |
Definition at line 1371 of file tulipreg.h.
#define CSR_ADM_FROM 0xa0 |
Definition at line 1417 of file tulipreg.h.
#define CSR_ADM_MAR0 0xac |
Definition at line 1436 of file tulipreg.h.
#define CSR_ADM_MAR1 0xb0 |
Definition at line 1440 of file tulipreg.h.
#define CSR_ADM_PAR0 0xa4 |
Definition at line 1428 of file tulipreg.h.
#define CSR_ADM_PAR1 0xa8 |
Definition at line 1432 of file tulipreg.h.
#define CSR_ADM_PCIC 0x8c |
Definition at line 1394 of file tulipreg.h.
#define CSR_ADM_PHYIDR1 0xbc |
Definition at line 1447 of file tulipreg.h.
#define CSR_ADM_PHYIDR2 0xc0 |
Definition at line 1448 of file tulipreg.h.
#define CSR_ADM_PMCSR 0x90 |
Definition at line 1403 of file tulipreg.h.
#define CSR_ADM_TXBR 0x9c |
Definition at line 1411 of file tulipreg.h.
#define CSR_ADM_WCSR 0x68 |
Definition at line 1313 of file tulipreg.h.
#define CSR_ADM_WPDR 0x70 |
Definition at line 1333 of file tulipreg.h.
#define CSR_ADM_XCIIS 0xd4 |
Definition at line 1460 of file tulipreg.h.
#define CSR_ADM_XIE 0xd8 |
Definition at line 1474 of file tulipreg.h.
#define CSR_ADM_XMC 0xd0 |
Definition at line 1454 of file tulipreg.h.
#define CSR_AX_FILTDATA TULIP_CSR14 |
Definition at line 1565 of file tulipreg.h.
#define CSR_AX_FILTIDX TULIP_CSR13 |
Definition at line 1562 of file tulipreg.h.
#define CSR_BUSMODE TULIP_CSR0 |
Definition at line 427 of file tulipreg.h.
Referenced by DEVICE_ACCESS().
#define CSR_DM_PHYSTAT TULIP_CSR12 |
Definition at line 1537 of file tulipreg.h.
#define CSR_DM_SFAR TULIP_CSR13 |
Definition at line 1550 of file tulipreg.h.
#define CSR_DM_SFDR TULIP_CSR14 |
Definition at line 1554 of file tulipreg.h.
#define CSR_GPP TULIP_CSR12 |
Definition at line 885 of file tulipreg.h.
#define CSR_GPT TULIP_CSR11 |
Definition at line 728 of file tulipreg.h.
#define CSR_INTEN TULIP_CSR7 |
Definition at line 661 of file tulipreg.h.
Referenced by DEVICE_TICK().
#define CSR_MIIROM TULIP_CSR9 |
Definition at line 680 of file tulipreg.h.
#define CSR_MISSED TULIP_CSR8 |
Definition at line 666 of file tulipreg.h.
Referenced by DEVICE_ACCESS().
#define CSR_OPMODE TULIP_CSR6 |
Definition at line 587 of file tulipreg.h.
Referenced by DEVICE_TICK().
#define CSR_PMAC_10TCTL TULIP_CSR14 |
Definition at line 1132 of file tulipreg.h.
#define CSR_PMAC_10TSTAT TULIP_CSR12 |
Definition at line 1118 of file tulipreg.h.
#define CSR_PMAC_NWAYRESET TULIP_CSR13 |
Definition at line 1125 of file tulipreg.h.
#define CSR_PMAC_NWAYSTAT TULIP_CSR20 |
Definition at line 1153 of file tulipreg.h.
#define CSR_PMAC_TOR TULIP_CSR16 |
Definition at line 1147 of file tulipreg.h.
#define CSR_PNIC_ENDEC 0x78 |
Definition at line 1034 of file tulipreg.h.
#define CSR_PNIC_MII 0xa0 |
Definition at line 1052 of file tulipreg.h.
#define CSR_PNIC_NWAY 0xb8 |
Definition at line 1068 of file tulipreg.h.
#define CSR_PNIC_SROMCTL 0x98 |
Definition at line 1046 of file tulipreg.h.
#define CSR_PNIC_SROMPWR 0x90 |
Definition at line 1038 of file tulipreg.h.
#define CSR_PNICII_FIL01 TULIP_CSR30 |
Definition at line 1246 of file tulipreg.h.
#define CSR_PNICII_FIL23 TULIP_CSR31 |
Definition at line 1252 of file tulipreg.h.
#define CSR_PNICII_FILOFF TULIP_CSR29 |
Definition at line 1234 of file tulipreg.h.
#define CSR_PNICII_FLOWCTL TULIP_CSR21 |
Definition at line 1176 of file tulipreg.h.
#define CSR_PNICII_MACID0 TULIP_CSR22 |
Definition at line 1202 of file tulipreg.h.
#define CSR_PNICII_MASK0 TULIP_CSR25 |
Definition at line 1224 of file tulipreg.h.
#define CSR_PNICII_MASK1 TULIP_CSR26 |
Definition at line 1226 of file tulipreg.h.
#define CSR_PNICII_MASK2 TULIP_CSR27 |
Definition at line 1228 of file tulipreg.h.
#define CSR_PNICII_MASK3 TULIP_CSR28 |
Definition at line 1230 of file tulipreg.h.
#define CSR_ROMADDR TULIP_CSR10 |
Definition at line 723 of file tulipreg.h.
#define CSR_RXLIST TULIP_CSR3 |
Definition at line 483 of file tulipreg.h.
Referenced by dec21143_rx().
#define CSR_RXPOLL TULIP_CSR2 |
Definition at line 478 of file tulipreg.h.
#define CSR_SIACONN TULIP_CSR13 |
Definition at line 786 of file tulipreg.h.
#define CSR_SIAGEN TULIP_CSR15 |
Definition at line 848 of file tulipreg.h.
#define CSR_SIASTAT TULIP_CSR12 |
Definition at line 740 of file tulipreg.h.
#define CSR_SIATXRX TULIP_CSR14 |
Definition at line 818 of file tulipreg.h.
#define CSR_STATUS TULIP_CSR5 |
Definition at line 489 of file tulipreg.h.
Referenced by dec21143_rx(), dec21143_tx(), DEVICE_ACCESS(), and DEVICE_TICK().
#define CSR_TXLIST TULIP_CSR4 |
Definition at line 486 of file tulipreg.h.
Referenced by dec21143_tx().
#define CSR_TXPOLL TULIP_CSR1 |
Definition at line 473 of file tulipreg.h.
#define CSR_WINB_CBRCR TULIP_CSR18 |
Definition at line 1286 of file tulipreg.h.
#define CSR_WINB_CCRBAR TULIP_CSR13 |
Definition at line 1266 of file tulipreg.h.
#define CSR_WINB_CMA0 TULIP_CSR14 |
Definition at line 1270 of file tulipreg.h.
#define CSR_WINB_CMA1 TULIP_CSR15 |
Definition at line 1274 of file tulipreg.h.
#define CSR_WINB_CPA0 TULIP_CSR16 |
Definition at line 1278 of file tulipreg.h.
#define CSR_WINB_CPA1 TULIP_CSR17 |
Definition at line 1282 of file tulipreg.h.
#define CSR_WINB_CRDAR TULIP_CSR12 |
Definition at line 1262 of file tulipreg.h.
#define CSR_WINB_CTBAR TULIP_CSR20 |
Definition at line 1302 of file tulipreg.h.
#define CSR_WINB_CTDAR TULIP_CSR19 |
Definition at line 1298 of file tulipreg.h.
#define CSR_X3201_PMR TULIP_CSR16 |
Definition at line 1515 of file tulipreg.h.
#define DM_PHYSTAT_10 0x00000001 /* 10Mb/s */ |
Definition at line 1538 of file tulipreg.h.
#define DM_PHYSTAT_100 0x00000002 /* 100Mb/s */ |
Definition at line 1539 of file tulipreg.h.
#define DM_PHYSTAT_FDX 0x00000004 /* full-duplex */ |
Definition at line 1540 of file tulipreg.h.
#define DM_PHYSTAT_GEPC 0x00000100 /* GPED bits control */ |
Definition at line 1546 of file tulipreg.h.
#define DM_PHYSTAT_GPED 0x00000080 /* general PHY reset control */ |
Definition at line 1545 of file tulipreg.h.
#define DM_PHYSTAT_LINK 0x00000008 /* link up */ |
Definition at line 1541 of file tulipreg.h.
#define DM_PHYSTAT_RXLOCK 0x00000010 /* RX-lock */ |
Definition at line 1542 of file tulipreg.h.
#define DM_PHYSTAT_SIGNAL 0x00000020 /* signal detection */ |
Definition at line 1543 of file tulipreg.h.
#define DM_PHYSTAT_UTPSIG 0x00000040 /* UTP SIG */ |
Definition at line 1544 of file tulipreg.h.
#define FDX21040_FDXACV |
Definition at line 929 of file tulipreg.h.
#define GPP_COGENT_EM1x0_INIT 0x09 /* No loopback --- point-to-point */ |
Definition at line 920 of file tulipreg.h.
#define GPP_COGENT_EM1x0_PINS 0x3f /* General Purpose Pin directions */ |
Definition at line 919 of file tulipreg.h.
#define GPP_GPC 0x00000100 /* general purpose control */ |
Definition at line 887 of file tulipreg.h.
#define GPP_MD 0x000000ff /* general purpose mode/data */ |
Definition at line 886 of file tulipreg.h.
#define GPP_PNIC_GPC 0x000000f0 /* general purpose control */ |
Definition at line 889 of file tulipreg.h.
#define GPP_PNIC_GPD 0x0000000f /* general purpose data */ |
Definition at line 888 of file tulipreg.h.
#define GPP_PNIC_IN | ( | x | ) | (1 << (x)) |
Definition at line 891 of file tulipreg.h.
#define GPP_PNIC_OUT | ( | x, | |
on | |||
) | (((on) << (x)) | (1 << ((x) + 4))) |
Definition at line 892 of file tulipreg.h.
#define GPP_PNIC_PIN_100M_LPKB 1 |
Definition at line 904 of file tulipreg.h.
#define GPP_PNIC_PIN_BNC_XMER 2 |
Definition at line 905 of file tulipreg.h.
#define GPP_PNIC_PIN_LNK100X 3 |
Definition at line 906 of file tulipreg.h.
#define GPP_PNIC_PIN_SPEED_RLY 0 |
Definition at line 903 of file tulipreg.h.
#define GPP_SMC9332DST_INIT 0x09 /* No loopback --- point-to-point */ |
Definition at line 914 of file tulipreg.h.
#define GPP_SMC9332DST_OK10 0x80 /* 10 Mb/sec Signal Detect gep<7> */ |
Definition at line 912 of file tulipreg.h.
#define GPP_SMC9332DST_OK100 0x40 /* 100 Mb/sec Signal Detect gep<6> */ |
Definition at line 913 of file tulipreg.h.
#define GPP_SMC9332DST_PINS 0x3f /* General Purpose Pin directions */ |
Definition at line 911 of file tulipreg.h.
#define GPT_CON 0x00010000 /* continuous mode */ |
Definition at line 730 of file tulipreg.h.
#define GPT_CYCLE 0x80000000 /* cycle size */ |
Definition at line 736 of file tulipreg.h.
#define GPT_NRX 0x000e0000 /* number of Rx packets */ |
Definition at line 732 of file tulipreg.h.
#define GPT_NTX 0x07000000 /* number of Tx packets */ |
Definition at line 734 of file tulipreg.h.
#define GPT_RXT 0x00f00000 /* Rx timer */ |
Definition at line 733 of file tulipreg.h.
#define GPT_TXT 0x78000000 /* Tx timer */ |
Definition at line 735 of file tulipreg.h.
#define GPT_VALUE 0x0000ffff /* timer value */ |
Definition at line 729 of file tulipreg.h.
#define MIIROM_BR 0x00001000 /* boot ROM select */ |
Definition at line 691 of file tulipreg.h.
#define MIIROM_DATA |
Definition at line 681 of file tulipreg.h.
#define MIIROM_DN 0x80000000 /* data not valid (21040) */ |
Definition at line 701 of file tulipreg.h.
#define MIIROM_MDC 0x00010000 /* MII clock */ |
Definition at line 695 of file tulipreg.h.
#define MIIROM_MDI 0x00080000 /* MII data in */ |
Definition at line 700 of file tulipreg.h.
#define MIIROM_MDO 0x00020000 /* MII data out */ |
Definition at line 696 of file tulipreg.h.
#define MIIROM_MIIDIR |
Definition at line 697 of file tulipreg.h.
#define MIIROM_MOD 0x00008000 /* mode select (ro) (21041) */ |
Definition at line 694 of file tulipreg.h.
#define MIIROM_PMAC_LED0SEL |
Definition at line 703 of file tulipreg.h.
#define MIIROM_PMAC_LED1SEL |
Definition at line 705 of file tulipreg.h.
#define MIIROM_PMAC_LED2SEL |
Definition at line 707 of file tulipreg.h.
#define MIIROM_PMAC_LED3SEL |
Definition at line 709 of file tulipreg.h.
#define MIIROM_RD 0x00004000 /* read from boot ROM */ |
Definition at line 693 of file tulipreg.h.
#define MIIROM_REG 0x00000400 /* external register select */ |
Definition at line 689 of file tulipreg.h.
#define MIIROM_SR 0x00000800 /* SROM select */ |
Definition at line 690 of file tulipreg.h.
#define MIIROM_SROMCS 0x00000001 /* SROM chip select */ |
Definition at line 685 of file tulipreg.h.
#define MIIROM_SROMDI 0x00000004 /* SROM data in (to) */ |
Definition at line 687 of file tulipreg.h.
#define MIIROM_SROMDO 0x00000008 /* SROM data out (from) */ |
Definition at line 688 of file tulipreg.h.
#define MIIROM_SROMSK 0x00000002 /* SROM clock */ |
Definition at line 686 of file tulipreg.h.
#define MIIROM_WR 0x00002000 /* write to boot ROM */ |
Definition at line 692 of file tulipreg.h.
#define MISSED_FOC |
Definition at line 670 of file tulipreg.h.
#define MISSED_GETFOC | ( | x | ) | (((x) & MISSED_FOC) >> 17) |
Definition at line 676 of file tulipreg.h.
#define MISSED_GETMFC | ( | x | ) | ((x) & MISSED_MFC) |
Definition at line 675 of file tulipreg.h.
#define MISSED_MFC 0x0000ffff /* missed packet count */ |
Definition at line 667 of file tulipreg.h.
#define MISSED_MFO |
Definition at line 668 of file tulipreg.h.
#define MISSED_OCO |
Definition at line 672 of file tulipreg.h.
#define OPMODE_AX_RB 0x00000100 /* recieve broadcast packets */ |
Definition at line 602 of file tulipreg.h.
#define OPMODE_BP 0x00010000 /* backpressure enable */ |
Definition at line 617 of file tulipreg.h.
#define OPMODE_CA 0x00020000 /* capture effect enable */ |
Definition at line 618 of file tulipreg.h.
#define OPMODE_FC 0x00001000 /* force collision */ |
Definition at line 608 of file tulipreg.h.
#define OPMODE_FD 0x00000200 /* full-duplex mode */ |
Definition at line 603 of file tulipreg.h.
#define OPMODE_FKD 0x00000100 /* flaky oscillator disable */ |
Definition at line 601 of file tulipreg.h.
#define OPMODE_HBD |
Definition at line 627 of file tulipreg.h.
#define OPMODE_HO 0x00000004 /* hash only mode (ro) */ |
Definition at line 590 of file tulipreg.h.
#define OPMODE_HP 0x00000001 /* hash/perfect mode (ro) */ |
Definition at line 588 of file tulipreg.h.
#define OPMODE_IDAMSB |
Definition at line 644 of file tulipreg.h.
#define OPMODE_IF 0x00000010 /* inverse filter mode (ro) */ |
Definition at line 593 of file tulipreg.h.
#define OPMODE_MBO |
Definition at line 642 of file tulipreg.h.
#define OPMODE_MEDIA_BITS (OPMODE_FD|OPMODE_PS|OPMODE_TTM|OPMODE_PCS|OPMODE_SCR) |
Definition at line 658 of file tulipreg.h.
#define OPMODE_OM 0x00000c00 /* operating mode */ |
Definition at line 604 of file tulipreg.h.
#define OPMODE_OM_EXTLOOP 0x00000800 /* external loopback */ |
Definition at line 607 of file tulipreg.h.
#define OPMODE_OM_INTLOOP 0x00000400 /* internal loopback */ |
Definition at line 606 of file tulipreg.h.
#define OPMODE_OM_NORMAL 0x00000000 /* normal mode */ |
Definition at line 605 of file tulipreg.h.
#define OPMODE_PB 0x00000008 /* pass bad frames */ |
Definition at line 591 of file tulipreg.h.
#define OPMODE_PCS 0x00800000 /* PCS function (21140) */ |
Definition at line 640 of file tulipreg.h.
#define OPMODE_PM 0x00000080 /* pass all multicast */ |
Definition at line 599 of file tulipreg.h.
#define OPMODE_PNIC_DRC |
Definition at line 646 of file tulipreg.h.
#define OPMODE_PNIC_EED |
Definition at line 650 of file tulipreg.h.
#define OPMODE_PNIC_IT 0x00100000 /* immediate transmit */ |
Definition at line 632 of file tulipreg.h.
#define OPMODE_PNIC_TBEN 0x00020000 /* Tx backoff offset enable */ |
Definition at line 619 of file tulipreg.h.
#define OPMODE_PR 0x00000040 /* promiscuous mode */ |
Definition at line 597 of file tulipreg.h.
#define OPMODE_PS |
Definition at line 624 of file tulipreg.h.
#define OPMODE_RA 0x40000000 /* receive all (21140) */ |
Definition at line 649 of file tulipreg.h.
#define OPMODE_SB 0x00000020 /* start backoff counter */ |
Definition at line 595 of file tulipreg.h.
#define OPMODE_SC |
Definition at line 653 of file tulipreg.h.
#define OPMODE_SCR 0x01000000 /* scrambler mode (21140) */ |
Definition at line 641 of file tulipreg.h.
#define OPMODE_SF |
Definition at line 633 of file tulipreg.h.
#define OPMODE_SR 0x00000002 /* start receive */ |
Definition at line 589 of file tulipreg.h.
Referenced by DEVICE_TICK().
#define OPMODE_ST 0x00002000 /* start transmitter */ |
Definition at line 609 of file tulipreg.h.
Referenced by DEVICE_TICK().
#define OPMODE_TR 0x0000c000 /* threshold control */ |
Definition at line 610 of file tulipreg.h.
#define OPMODE_TR_128 0x00008000 /* 128 bytes */ |
Definition at line 613 of file tulipreg.h.
#define OPMODE_TR_160 0x0000c000 /* 160 bytes */ |
Definition at line 614 of file tulipreg.h.
#define OPMODE_TR_72 0x00000000 /* 72 bytes */ |
Definition at line 611 of file tulipreg.h.
#define OPMODE_TR_96 0x00004000 /* 96 bytes */ |
Definition at line 612 of file tulipreg.h.
#define OPMODE_TTM |
Definition at line 637 of file tulipreg.h.
#define OPMODE_WINB_ABP 0x00000020 /* accept broadcast packet */ |
Definition at line 596 of file tulipreg.h.
#define OPMODE_WINB_AEP 0x00000080 /* accept error packet */ |
Definition at line 600 of file tulipreg.h.
#define OPMODE_WINB_AMP 0x00000010 /* accept multicast packet */ |
Definition at line 594 of file tulipreg.h.
#define OPMODE_WINB_APP 0x00000008 /* accept all physcal packet */ |
Definition at line 592 of file tulipreg.h.
#define OPMODE_WINB_ARP 0x00000040 /* accept runt packet */ |
Definition at line 598 of file tulipreg.h.
#define OPMODE_WINB_FES 0x20000000 /* fast ethernet select */ |
Definition at line 648 of file tulipreg.h.
#define OPMODE_WINB_REIO 0x80000000 /* receive early intr on */ |
Definition at line 655 of file tulipreg.h.
#define OPMODE_WINB_REIT 0x1fe00000 /* receive eartly intr thresh */ |
Definition at line 635 of file tulipreg.h.
#define OPMODE_WINB_REIT_SHIFT 21 |
Definition at line 636 of file tulipreg.h.
#define OPMODE_WINB_TEIO 0x40000000 /* transmit early intr on */ |
Definition at line 652 of file tulipreg.h.
#define OPMODE_WINB_TTH 0x001fc000 /* transmit threshold */ |
Definition at line 615 of file tulipreg.h.
#define OPMODE_WINB_TTH_SHIFT 14 |
Definition at line 616 of file tulipreg.h.
#define PMAC_NWAYRESET_100TXRESET 0x00000002 /* 100base PMD reset */ |
Definition at line 1128 of file tulipreg.h.
#define PMAC_NWAYSTAT_100TXF 0x40000000 /* 100tx-fdx accepted */ |
Definition at line 1171 of file tulipreg.h.
#define PMAC_NWAYSTAT_100TXH 0x20000000 /* 100tx accepted */ |
Definition at line 1170 of file tulipreg.h.
#define PMAC_NWAYSTAT_10TXF 0x10000000 /* 10t-fdx accepted */ |
Definition at line 1169 of file tulipreg.h.
#define PMAC_NWAYSTAT_10TXH 0x08000000 /* 10t accepted */ |
Definition at line 1168 of file tulipreg.h.
#define PMAC_NWAYSTAT_DS120 0x00000200 /* Auto-compensation circ */ |
Definition at line 1164 of file tulipreg.h.
#define PMAC_NWAYSTAT_DS130 0x00004000 /* Auto-compensation circ */ |
Definition at line 1165 of file tulipreg.h.
#define PMAC_NWAYSTAT_EQTEST 0x00001000 /* EQ test */ |
Definition at line 1166 of file tulipreg.h.
#define PMAC_NWAYSTAT_PCITEST 0x00010000 /* PCI test */ |
Definition at line 1167 of file tulipreg.h.
#define PMAC_NWAYSTAT_T4 0x80000000 /* 100t4 accepted */ |
Definition at line 1172 of file tulipreg.h.
#define PMAC_SIACONN_MASK (SIACONN_SRL) |
Definition at line 1127 of file tulipreg.h.
#define PMAC_SIAGEN_MASK |
Definition at line 1142 of file tulipreg.h.
#define PMAC_SIASTAT_MASK |
Definition at line 1119 of file tulipreg.h.
#define PMAC_SIATXRX_MASK |
Definition at line 1134 of file tulipreg.h.
#define PMAC_TOR_98713 0x0F370000 |
Definition at line 1148 of file tulipreg.h.
#define PMAC_TOR_98715 0x0B3C0000 |
Definition at line 1149 of file tulipreg.h.
#define PNIC_ENDEC_JDIS 0x00000001 /* jabber disable */ |
Definition at line 1035 of file tulipreg.h.
#define PNIC_MII_BUSY 0x80000000 /* MII is busy */ |
Definition at line 1062 of file tulipreg.h.
#define PNIC_MII_DATA 0x0000ffff /* mask of data bits */ |
Definition at line 1053 of file tulipreg.h.
#define PNIC_MII_MBO 0x40000000 /* must be one */ |
Definition at line 1061 of file tulipreg.h.
#define PNIC_MII_OPCODE 0x30000000 /* opcode mask */ |
Definition at line 1058 of file tulipreg.h.
#define PNIC_MII_PHY 0x0f800000 /* phy mask */ |
Definition at line 1056 of file tulipreg.h.
#define PNIC_MII_PHYSHIFT 23 |
Definition at line 1057 of file tulipreg.h.
#define PNIC_MII_READ 0x20000000 /* read PHY command */ |
Definition at line 1065 of file tulipreg.h.
#define PNIC_MII_REG 0x007c0000 /* register mask */ |
Definition at line 1054 of file tulipreg.h.
#define PNIC_MII_REGSHIFT 18 |
Definition at line 1055 of file tulipreg.h.
#define PNIC_MII_RESERVED |
Definition at line 1059 of file tulipreg.h.
#define PNIC_MII_WRITE 0x10000000 /* write PHY command */ |
Definition at line 1064 of file tulipreg.h.
#define PNIC_MIIROM_BUSY 0x80000000 /* EEPROM is busy */ |
Definition at line 719 of file tulipreg.h.
#define PNIC_MIIROM_DATA 0x0000ffff /* mask of data bits ??? */ |
Definition at line 718 of file tulipreg.h.
#define PNIC_NWAY_100 0x00000800 /* 1 == 100mbps, 0 == 10mbps */ |
Definition at line 1082 of file tulipreg.h.
#define PNIC_NWAY_AF |
Definition at line 1076 of file tulipreg.h.
#define PNIC_NWAY_BX 0x00000004 /* bypass transceiver */ |
Definition at line 1071 of file tulipreg.h.
#define PNIC_NWAY_CAP100T4 0x00020000 /* adv. 100base-T4 */ |
Definition at line 1088 of file tulipreg.h.
#define PNIC_NWAY_CAP100TX 0x00010000 /* adv. 100baseTX */ |
Definition at line 1087 of file tulipreg.h.
#define PNIC_NWAY_CAP100TXFDX 0x00008000 /* adv. 100baseTX-FDX */ |
Definition at line 1086 of file tulipreg.h.
#define PNIC_NWAY_CAP10T 0x00002000 /* adv. 10baseT */ |
Definition at line 1084 of file tulipreg.h.
#define PNIC_NWAY_CAP10TFDX 0x00004000 /* adv. 10baseT-FDX */ |
Definition at line 1085 of file tulipreg.h.
#define PNIC_NWAY_DL |
Definition at line 1079 of file tulipreg.h.
#define PNIC_NWAY_DM 0x00000400 /* disable AUI/TP autodetect */ |
Definition at line 1081 of file tulipreg.h.
#define PNIC_NWAY_DX 0x00000020 /* disable TP pol. correction */ |
Definition at line 1074 of file tulipreg.h.
#define PNIC_NWAY_FD 0x00000100 /* full duplex mode */ |
Definition at line 1078 of file tulipreg.h.
#define PNIC_NWAY_LC 0x00000008 /* AUI low current mode */ |
Definition at line 1072 of file tulipreg.h.
#define PNIC_NWAY_LPAR100T4 0x80000000 /* link part. 100base-T4 */ |
Definition at line 1095 of file tulipreg.h.
#define PNIC_NWAY_LPAR100TX 0x40000000 /* link part. 100baseTX */ |
Definition at line 1094 of file tulipreg.h.
#define PNIC_NWAY_LPAR100TXFDX 0x20000000 /* link part. 100baseTX-FDX */ |
Definition at line 1093 of file tulipreg.h.
#define PNIC_NWAY_LPAR10T 0x08000000 /* link part. 10baseT */ |
Definition at line 1091 of file tulipreg.h.
#define PNIC_NWAY_LPAR10TFDX 0x10000000 /* link part. 10baseT-FDX */ |
Definition at line 1092 of file tulipreg.h.
#define PNIC_NWAY_LPAR_MASK 0xf8000000 |
Definition at line 1096 of file tulipreg.h.
#define PNIC_NWAY_NW 0x00001000 /* enable NWay block */ |
Definition at line 1083 of file tulipreg.h.
#define PNIC_NWAY_PD 0x00000002 /* power down NWay block */ |
Definition at line 1070 of file tulipreg.h.
#define PNIC_NWAY_RF 0x04000000 /* remote fault detected */ |
Definition at line 1090 of file tulipreg.h.
#define PNIC_NWAY_RN 0x02000000 /* re-negotiate enable */ |
Definition at line 1089 of file tulipreg.h.
#define PNIC_NWAY_RS 0x00000001 /* reset NWay block */ |
Definition at line 1069 of file tulipreg.h.
#define PNIC_NWAY_TW 0x00000040 /* select TP (0 == AUI) */ |
Definition at line 1075 of file tulipreg.h.
#define PNIC_NWAY_UV 0x00000010 /* low squelch voltage */ |
Definition at line 1073 of file tulipreg.h.
#define PNIC_SROMCTL_addr 0x0000003f /* mask of address bits */ |
Definition at line 1047 of file tulipreg.h.
#define PNIC_SROMCTL_READ 0x00000600 /* read command */ |
Definition at line 1049 of file tulipreg.h.
#define PNIC_SROMPWR_CB |
Definition at line 1040 of file tulipreg.h.
#define PNIC_SROMPWR_MRLE 0x00000001 /* Memory-Read-Line enable */ |
Definition at line 1039 of file tulipreg.h.
#define PNICII_FIL01_CRC0 0x0000ffff /* CRC-16 of pattern 0 */ |
Definition at line 1247 of file tulipreg.h.
#define PNICII_FIL01_CRC1 0xffff0000 /* CRC-16 of pattern 1 */ |
Definition at line 1248 of file tulipreg.h.
#define PNICII_FIL23_CRC2 0x0000ffff /* CRC-16 of pattern 2 */ |
Definition at line 1253 of file tulipreg.h.
#define PNICII_FIL23_CRC3 0xffff0000 /* CRC-16 of pattern 3 */ |
Definition at line 1254 of file tulipreg.h.
#define PNICII_FILOFF_EN0 0x00000080 /* enable pattern 0 */ |
Definition at line 1236 of file tulipreg.h.
#define PNICII_FILOFF_EN1 0x00008000 /* enable pattern 1 */ |
Definition at line 1238 of file tulipreg.h.
#define PNICII_FILOFF_EN2 0x00800000 /* enable pattern 2 */ |
Definition at line 1240 of file tulipreg.h.
#define PNICII_FILOFF_EN3 0x80000000 /* enable pattern 3 */ |
Definition at line 1242 of file tulipreg.h.
#define PNICII_FILOFF_PAT0 0x0000007f /* pattern 0 offset */ |
Definition at line 1235 of file tulipreg.h.
#define PNICII_FILOFF_PAT1 0x00007f00 /* pattern 1 offset */ |
Definition at line 1237 of file tulipreg.h.
#define PNICII_FILOFF_PAT2 0x007f0000 /* pattern 2 offset */ |
Definition at line 1239 of file tulipreg.h.
#define PNICII_FILOFF_PAT3 0x7f000000 /* pattern 3 offset */ |
Definition at line 1241 of file tulipreg.h.
#define PNICII_FLOWCTL_FCTH0 0x00000040 /* rx flow control thresh 0 */ |
Definition at line 1181 of file tulipreg.h.
#define PNICII_FLOWCTL_FCTH1 0x00000080 /* rx flow control thresh 1 */ |
Definition at line 1182 of file tulipreg.h.
#define PNICII_FLOWCTL_NFCE |
Definition at line 1179 of file tulipreg.h.
#define PNICII_FLOWCTL_REJECTFC 0x00000100 /* abort rx flow control */ |
Definition at line 1183 of file tulipreg.h.
#define PNICII_FLOWCTL_RESTART 0x00004000 /* restart mode */ |
Definition at line 1190 of file tulipreg.h.
#define PNICII_FLOWCTL_RESTOP 0x00002000 /* restop mode */ |
Definition at line 1189 of file tulipreg.h.
#define PNICII_FLOWCTL_RUFCEN |
Definition at line 1185 of file tulipreg.h.
#define PNICII_FLOWCTL_RXFCEN 0x00000800 /* rx flow control enable */ |
Definition at line 1187 of file tulipreg.h.
#define PNICII_FLOWCTL_STOPTX 0x00000200 /* tx flow stopped */ |
Definition at line 1184 of file tulipreg.h.
#define PNICII_FLOWCTL_TEST 0x00008000 /* test flow control timer */ |
Definition at line 1191 of file tulipreg.h.
#define PNICII_FLOWCTL_TH_128 (PNICII_FLOWCTL_FCTH0) |
Definition at line 1197 of file tulipreg.h.
#define PNICII_FLOWCTL_TH_256 (PNICII_FLOWCTL_FCTH1) |
Definition at line 1196 of file tulipreg.h.
#define PNICII_FLOWCTL_TH_512 (PNICII_FLOWCTL_FCTH0|PNICII_FLOWCTL_FCTH1) |
Definition at line 1195 of file tulipreg.h.
#define PNICII_FLOWCTL_TH_OVFLW (0) |
Definition at line 1198 of file tulipreg.h.
#define PNICII_FLOWCTL_TMVAL |
Definition at line 1192 of file tulipreg.h.
#define PNICII_FLOWCTL_TXFCEN 0x00001000 /* tx flow control enable */ |
Definition at line 1188 of file tulipreg.h.
#define PNICII_FLOWCTL_WKFCATEN |
Definition at line 1177 of file tulipreg.h.
#define PNICII_MACID_0 8 /* shift */ |
Definition at line 1204 of file tulipreg.h.
#define PNICII_MACID_1 0 /* shift */ |
Definition at line 1203 of file tulipreg.h.
#define PNICII_MACID_2 24 /* shift */ |
Definition at line 1206 of file tulipreg.h.
#define PNICII_MACID_3 16 /* shift */ |
Definition at line 1205 of file tulipreg.h.
#define PNICII_MACID_4 8 /* shift */ |
Definition at line 1211 of file tulipreg.h.
#define PNICII_MACID_5 0 /* shift */ |
Definition at line 1210 of file tulipreg.h.
#define PNICII_MAGIC_4 24 /* shift */ |
Definition at line 1213 of file tulipreg.h.
#define PNICII_MAGID_0 8 /* shift */ |
Definition at line 1218 of file tulipreg.h.
#define PNICII_MAGID_1 0 /* shift */ |
Definition at line 1217 of file tulipreg.h.
#define PNICII_MAGID_2 24 /* shift */ |
Definition at line 1220 of file tulipreg.h.
#define PNICII_MAGID_3 16 /* shift */ |
Definition at line 1219 of file tulipreg.h.
#define PNICII_MAGID_5 16 /* shift */ |
Definition at line 1212 of file tulipreg.h.
#define ROMADDR_MASK 0x000003ff /* boot rom address */ |
Definition at line 724 of file tulipreg.h.
#define RXPOLL_RPD 0x00000001 /* receive poll demand */ |
Definition at line 479 of file tulipreg.h.
#define SELECT_CONN_TYPE MII_10T 0x0009 |
Definition at line 338 of file tulipreg.h.
#define SELECT_CONN_TYPE_100FX 0x0007 |
Definition at line 337 of file tulipreg.h.
#define SELECT_CONN_TYPE_100T4 0x0006 |
Definition at line 336 of file tulipreg.h.
#define SELECT_CONN_TYPE_100TX 0x0003 |
Definition at line 335 of file tulipreg.h.
#define SELECT_CONN_TYPE_100TX_FDX 0x020e |
Definition at line 345 of file tulipreg.h.
#define SELECT_CONN_TYPE_ASENSE 0x0800 |
Definition at line 348 of file tulipreg.h.
#define SELECT_CONN_TYPE_ASENSE_AUTONEG 0x0900 |
Definition at line 350 of file tulipreg.h.
#define SELECT_CONN_TYPE_ASENSE_POWERUP 0x8800 |
Definition at line 349 of file tulipreg.h.
#define SELECT_CONN_TYPE_AUI 0x0002 |
Definition at line 334 of file tulipreg.h.
#define SELECT_CONN_TYPE_BNC 0x0001 |
Definition at line 333 of file tulipreg.h.
#define SELECT_CONN_TYPE_MII_100FX 0x0010 |
Definition at line 341 of file tulipreg.h.
#define SELECT_CONN_TYPE_MII_100T4 0x000f |
Definition at line 340 of file tulipreg.h.
#define SELECT_CONN_TYPE_MII_100TX 0x000d |
Definition at line 339 of file tulipreg.h.
#define SELECT_CONN_TYPE_MII_100TX_FDX 0x0211 |
Definition at line 346 of file tulipreg.h.
#define SELECT_CONN_TYPE_MII_10T_FDX 0x020a |
Definition at line 344 of file tulipreg.h.
#define SELECT_CONN_TYPE_TP 0x0000 |
Definition at line 332 of file tulipreg.h.
#define SELECT_CONN_TYPE_TP_AUTONEG 0x0100 |
Definition at line 342 of file tulipreg.h.
#define SELECT_CONN_TYPE_TP_FDX 0x0204 |
Definition at line 343 of file tulipreg.h.
#define SELECT_CONN_TYPE_TP_NOLINKPASS 0x0400 |
Definition at line 347 of file tulipreg.h.
#define SIACONN_21040_10BASET 0x0000ef01 |
Definition at line 934 of file tulipreg.h.
#define SIACONN_21040_10BASET_FDX 0x0000ef01 |
Definition at line 940 of file tulipreg.h.
#define SIACONN_21040_AUI 0x0000ef09 |
Definition at line 946 of file tulipreg.h.
#define SIACONN_21040_EXTSIA 0x00003041 |
Definition at line 952 of file tulipreg.h.
#define SIACONN_21041_10BASET 0x0000ef01 |
Definition at line 962 of file tulipreg.h.
#define SIACONN_21041_10BASET_FDX 0x0000ef01 |
Definition at line 972 of file tulipreg.h.
#define SIACONN_21041_AUI 0x0000ef09 |
Definition at line 982 of file tulipreg.h.
#define SIACONN_21041_BNC 0x0000ef09 |
Definition at line 992 of file tulipreg.h.
#define SIACONN_21041P2_10BASET SIACONN_21041_10BASET |
Definition at line 966 of file tulipreg.h.
#define SIACONN_21041P2_10BASET_FDX SIACONN_21041_10BASET_FDX |
Definition at line 976 of file tulipreg.h.
#define SIACONN_21041P2_AUI SIACONN_21041_AUI |
Definition at line 986 of file tulipreg.h.
#define SIACONN_21041P2_BNC SIACONN_21041_BNC |
Definition at line 996 of file tulipreg.h.
#define SIACONN_21142_10BASET 0x00000001 |
Definition at line 1006 of file tulipreg.h.
#define SIACONN_21142_10BASET_FDX 0x00000001 |
Definition at line 1012 of file tulipreg.h.
#define SIACONN_21142_AUI 0x00000009 |
Definition at line 1018 of file tulipreg.h.
#define SIACONN_21142_BNC 0x00000009 |
Definition at line 1024 of file tulipreg.h.
#define SIACONN_ASE |
Definition at line 799 of file tulipreg.h.
#define SIACONN_AUI 0x00000008 /* select AUI (0 = TP) */ |
Definition at line 792 of file tulipreg.h.
#define SIACONN_CAC 0x00000004 /* CSR autoconfiguration */ |
Definition at line 791 of file tulipreg.h.
#define SIACONN_EDP |
Definition at line 793 of file tulipreg.h.
#define SIACONN_ENI |
Definition at line 795 of file tulipreg.h.
#define SIACONN_IE 0x00001000 /* input enable (21040) */ |
Definition at line 804 of file tulipreg.h.
#define SIACONN_OE1_3 |
Definition at line 805 of file tulipreg.h.
#define SIACONN_OE2_4 |
Definition at line 807 of file tulipreg.h.
#define SIACONN_OE5_6_7 |
Definition at line 809 of file tulipreg.h.
#define SIACONN_PS |
Definition at line 789 of file tulipreg.h.
#define SIACONN_SDM |
Definition at line 811 of file tulipreg.h.
#define SIACONN_SEL |
Definition at line 801 of file tulipreg.h.
#define SIACONN_SIM |
Definition at line 797 of file tulipreg.h.
#define SIACONN_SRL |
Definition at line 787 of file tulipreg.h.
#define SIAGEN_21040_10BASET 0x00000000 |
Definition at line 936 of file tulipreg.h.
#define SIAGEN_21040_10BASET_FDX 0x00000000 |
Definition at line 942 of file tulipreg.h.
#define SIAGEN_21040_AUI 0x00000006 |
Definition at line 948 of file tulipreg.h.
#define SIAGEN_21040_EXTSIA 0x00000006 |
Definition at line 954 of file tulipreg.h.
#define SIAGEN_21041_10BASET 0x00000000 |
Definition at line 964 of file tulipreg.h.
#define SIAGEN_21041_10BASET_FDX 0x00000000 |
Definition at line 974 of file tulipreg.h.
#define SIAGEN_21041_AUI 0x0000000e |
Definition at line 984 of file tulipreg.h.
#define SIAGEN_21041_BNC 0x00000006 |
Definition at line 994 of file tulipreg.h.
#define SIAGEN_21041P2_10BASET SIAGEN_21041_10BASET |
Definition at line 968 of file tulipreg.h.
#define SIAGEN_21041P2_10BASET_FDX SIAGEN_21041_10BASET_FDX |
Definition at line 978 of file tulipreg.h.
#define SIAGEN_21041P2_AUI SIAGEN_21041_AUI |
Definition at line 988 of file tulipreg.h.
#define SIAGEN_21041P2_BNC SIAGEN_21041_BNC |
Definition at line 998 of file tulipreg.h.
#define SIAGEN_21142_10BASET 0x00000008 |
Definition at line 1008 of file tulipreg.h.
#define SIAGEN_21142_10BASET_FDX 0x00000008 |
Definition at line 1014 of file tulipreg.h.
#define SIAGEN_21142_AUI 0x0000000e |
Definition at line 1020 of file tulipreg.h.
#define SIAGEN_21142_BNC 0x00000006 |
Definition at line 1026 of file tulipreg.h.
#define SIAGEN_ABM 0x00000008 /* BNC select (21041) */ |
Definition at line 852 of file tulipreg.h.
#define SIAGEN_CWE 0x08000000 /* control write enable */ |
Definition at line 878 of file tulipreg.h.
#define SIAGEN_DPST 0x00001000 /* PLL self-test start */ |
Definition at line 863 of file tulipreg.h.
#define SIAGEN_FLF 0x00000400 /* force link fail */ |
Definition at line 859 of file tulipreg.h.
#define SIAGEN_FRL 0x00002000 /* force receiver low */ |
Definition at line 864 of file tulipreg.h.
#define SIAGEN_FUSQ 0x00000200 /* force unsquelch */ |
Definition at line 858 of file tulipreg.h.
#define SIAGEN_GEI0 0x01000000 /* GEP pin 0 intr enable */ |
Definition at line 875 of file tulipreg.h.
#define SIAGEN_GEI1 0x02000000 /* GEP pin 1 intr enable */ |
Definition at line 876 of file tulipreg.h.
#define SIAGEN_GI0 0x10000000 /* GEP pin 0 interrupt */ |
Definition at line 879 of file tulipreg.h.
#define SIAGEN_GI1 0x20000000 /* GEP pin 1 interrupt */ |
Definition at line 880 of file tulipreg.h.
#define SIAGEN_HCKR 0x00008000 /* hacker (21143) */ |
Definition at line 869 of file tulipreg.h.
#define SIAGEN_HUJ 0x00000002 /* host unjab */ |
Definition at line 850 of file tulipreg.h.
#define SIAGEN_JBD 0x00000001 /* jabber disable */ |
Definition at line 849 of file tulipreg.h.
#define SIAGEN_JCK 0x00000004 /* jabber clock */ |
Definition at line 851 of file tulipreg.h.
#define SIAGEN_LE1 0x00000040 /* LED 1 enable (21041) */ |
Definition at line 855 of file tulipreg.h.
#define SIAGEN_LE2 0x00004000 /* LED 2 enable (21041) */ |
Definition at line 865 of file tulipreg.h.
#define SIAGEN_LEE 0x00000800 /* Link extend enable (21142) */ |
Definition at line 862 of file tulipreg.h.
#define SIAGEN_LGS0 0x00100000 /* LED/GEP 0 select */ |
Definition at line 871 of file tulipreg.h.
#define SIAGEN_LGS1 0x00200000 /* LED/GEP 1 select */ |
Definition at line 872 of file tulipreg.h.
#define SIAGEN_LGS2 0x00400000 /* LED/GEP 2 select */ |
Definition at line 873 of file tulipreg.h.
#define SIAGEN_LGS3 0x00800000 /* LED/GEP 3 select */ |
Definition at line 874 of file tulipreg.h.
#define SIAGEN_LSD |
Definition at line 860 of file tulipreg.h.
#define SIAGEN_LV1 0x00000080 /* LED 1 value (21041) */ |
Definition at line 856 of file tulipreg.h.
#define SIAGEN_LV2 0x00008000 /* LED 2 value (21041) */ |
Definition at line 868 of file tulipreg.h.
#define SIAGEN_MD 0x000f0000 /* general purpose mode/data */ |
Definition at line 870 of file tulipreg.h.
#define SIAGEN_RME 0x04000000 /* receive match enable */ |
Definition at line 877 of file tulipreg.h.
#define SIAGEN_RMI 0x40000000 /* receive match interrupt */ |
Definition at line 881 of file tulipreg.h.
#define SIAGEN_RMP |
Definition at line 866 of file tulipreg.h.
#define SIAGEN_RWD 0x00000010 /* receive watchdog disable */ |
Definition at line 853 of file tulipreg.h.
#define SIAGEN_RWR 0x00000020 /* receive watchdog release */ |
Definition at line 854 of file tulipreg.h.
#define SIAGEN_TSCK 0x00000100 /* test clock */ |
Definition at line 857 of file tulipreg.h.
#define SIASTAT_ANS |
Definition at line 768 of file tulipreg.h.
#define SIASTAT_ANS_ABD 0x00002000 /* ability detect */ |
Definition at line 773 of file tulipreg.h.
#define SIASTAT_ANS_ACKC 0x00004000 /* complete acknowledge */ |
Definition at line 775 of file tulipreg.h.
#define SIASTAT_ANS_ACKD 0x00003000 /* acknowledge detect */ |
Definition at line 774 of file tulipreg.h.
#define SIASTAT_ANS_DIS 0x00000000 /* disabled */ |
Definition at line 770 of file tulipreg.h.
#define SIASTAT_ANS_FLPGOOD 0x00005000 /* FLP link good */ |
Definition at line 776 of file tulipreg.h.
#define SIASTAT_ANS_LINKCHECK 0x00006000 /* link check */ |
Definition at line 777 of file tulipreg.h.
#define SIASTAT_ANS_START 0x00001000 /* (MX98715AEC) */ |
Definition at line 772 of file tulipreg.h.
#define SIASTAT_ANS_TXDIS 0x00001000 /* transmit disabled */ |
Definition at line 771 of file tulipreg.h.
#define SIASTAT_APS 0x00000008 /* auto polarity status */ |
Definition at line 751 of file tulipreg.h.
#define SIASTAT_ARA |
Definition at line 758 of file tulipreg.h.
#define SIASTAT_DAO 0x00000080 /* PLL all one */ |
Definition at line 755 of file tulipreg.h.
#define SIASTAT_DAZ 0x00000040 /* PLL all zero */ |
Definition at line 754 of file tulipreg.h.
#define SIASTAT_DSD 0x00000010 /* PLL self test done */ |
Definition at line 752 of file tulipreg.h.
#define SIASTAT_DSP 0x00000020 /* PLL self test pass */ |
Definition at line 753 of file tulipreg.h.
#define SIASTAT_GETLPC | ( | x | ) | (((x) & SIASTAT_LPC) >> 16) |
Definition at line 782 of file tulipreg.h.
#define SIASTAT_LKF 0x00000004 /* link fail status */ |
Definition at line 748 of file tulipreg.h.
#define SIASTAT_LPC 0xffff0000 /* link partner code word */ |
Definition at line 780 of file tulipreg.h.
#define SIASTAT_LPN |
Definition at line 778 of file tulipreg.h.
#define SIASTAT_LS10 |
Definition at line 749 of file tulipreg.h.
#define SIASTAT_LS100 |
Definition at line 746 of file tulipreg.h.
#define SIASTAT_MRA |
Definition at line 743 of file tulipreg.h.
#define SIASTAT_NCR 0x00000002 /* network connection error */ |
Definition at line 745 of file tulipreg.h.
#define SIASTAT_NRA |
Definition at line 760 of file tulipreg.h.
#define SIASTAT_NSN |
Definition at line 764 of file tulipreg.h.
#define SIASTAT_PAUI |
Definition at line 741 of file tulipreg.h.
#define SIASTAT_SRA |
Definition at line 756 of file tulipreg.h.
#define SIASTAT_TRA |
Definition at line 762 of file tulipreg.h.
#define SIASTAT_TRF |
Definition at line 766 of file tulipreg.h.
#define SIATXRX_21040_10BASET 0x0000ffff |
Definition at line 935 of file tulipreg.h.
#define SIATXRX_21040_10BASET_FDX 0x0000fffd |
Definition at line 941 of file tulipreg.h.
#define SIATXRX_21040_AUI 0x00000705 |
Definition at line 947 of file tulipreg.h.
#define SIATXRX_21040_EXTSIA 0x00000000 |
Definition at line 953 of file tulipreg.h.
#define SIATXRX_21041_10BASET 0x0000ff3f |
Definition at line 963 of file tulipreg.h.
#define SIATXRX_21041_10BASET_FDX 0x0000ff3d |
Definition at line 973 of file tulipreg.h.
#define SIATXRX_21041_AUI 0x0000f73d |
Definition at line 983 of file tulipreg.h.
#define SIATXRX_21041_BNC 0x0000f73d |
Definition at line 993 of file tulipreg.h.
#define SIATXRX_21041P2_10BASET 0x0000ffff |
Definition at line 967 of file tulipreg.h.
#define SIATXRX_21041P2_10BASET_FDX 0x0000ffff |
Definition at line 977 of file tulipreg.h.
#define SIATXRX_21041P2_AUI 0x0000f7fd |
Definition at line 987 of file tulipreg.h.
#define SIATXRX_21041P2_BNC 0x0000f7fd |
Definition at line 997 of file tulipreg.h.
#define SIATXRX_21142_10BASET 0x00007f3f |
Definition at line 1007 of file tulipreg.h.
#define SIATXRX_21142_10BASET_FDX 0x00007f3d |
Definition at line 1013 of file tulipreg.h.
#define SIATXRX_21142_AUI 0x00004705 |
Definition at line 1019 of file tulipreg.h.
#define SIATXRX_21142_BNC 0x00004705 |
Definition at line 1025 of file tulipreg.h.
#define SIATXRX_ANE |
Definition at line 830 of file tulipreg.h.
#define SIATXRX_APE 0x00002000 /* auto-polarity enable */ |
Definition at line 838 of file tulipreg.h.
#define SIATXRX_CLD 0x00000400 /* collision detect enable */ |
Definition at line 834 of file tulipreg.h.
#define SIATXRX_CPEN 0x00000030 /* compensation enable */ |
Definition at line 823 of file tulipreg.h.
#define SIATXRX_CPEN_DIS0 0x00000000 /* disabled */ |
Definition at line 824 of file tulipreg.h.
#define SIATXRX_CPEN_DIS1 0x00000010 /* disabled */ |
Definition at line 825 of file tulipreg.h.
#define SIATXRX_CPEN_HIGHPWR 0x00000020 /* high power */ |
Definition at line 826 of file tulipreg.h.
#define SIATXRX_CPEN_NORMAL 0x00000030 /* normal */ |
Definition at line 827 of file tulipreg.h.
#define SIATXRX_CSQ 0x00000200 /* collision squelch enable */ |
Definition at line 833 of file tulipreg.h.
#define SIATXRX_DREN 0x00000004 /* driver enable */ |
Definition at line 821 of file tulipreg.h.
#define SIATXRX_ECEN 0x00000001 /* encoder enable */ |
Definition at line 819 of file tulipreg.h.
#define SIATXRX_LBK 0x00000002 /* loopback enable */ |
Definition at line 820 of file tulipreg.h.
#define SIATXRX_LSE 0x00000008 /* link pulse send enable */ |
Definition at line 822 of file tulipreg.h.
#define SIATXRX_LTE 0x00001000 /* link test enable */ |
Definition at line 837 of file tulipreg.h.
#define SIATXRX_MBO 0x00000040 /* must be one (21041 pass 2) */ |
Definition at line 828 of file tulipreg.h.
#define SIATXRX_RSQ 0x00000100 /* receive squelch enable */ |
Definition at line 832 of file tulipreg.h.
#define SIATXRX_SPP 0x00004000 /* set polarity plus */ |
Definition at line 839 of file tulipreg.h.
#define SIATXRX_SQE |
Definition at line 835 of file tulipreg.h.
#define SIATXRX_T4 0x00040000 /* 100baseT4 (21142) */ |
Definition at line 844 of file tulipreg.h.
#define SIATXRX_TAS |
Definition at line 840 of file tulipreg.h.
#define SIATXRX_TH 0x00000040 /* 10baseT HDX enable (21142) */ |
Definition at line 829 of file tulipreg.h.
#define SIATXRX_THX 0x00010000 /* 100baseTX-HDX (21142) */ |
Definition at line 842 of file tulipreg.h.
#define SIATXRX_TXF 0x00020000 /* 100baseTX-FDX (21142) */ |
Definition at line 843 of file tulipreg.h.
#define STATUS_AIS 0x00008000 /* abnormal interrupt summary */ |
Definition at line 512 of file tulipreg.h.
Referenced by DEVICE_TICK().
#define STATUS_AT |
Definition at line 502 of file tulipreg.h.
#define STATUS_DM_RS_CLOSE_OWN |
Definition at line 536 of file tulipreg.h.
#define STATUS_DM_RS_CLOSE_ST |
Definition at line 538 of file tulipreg.h.
#define STATUS_DM_RS_FETCH |
Definition at line 530 of file tulipreg.h.
#define STATUS_DM_RS_FLUSH |
Definition at line 541 of file tulipreg.h.
#define STATUS_DM_RS_QUEUE |
Definition at line 533 of file tulipreg.h.
#define STATUS_DM_RS_STOPPED 0x00000000 /* Stopped */ |
Definition at line 529 of file tulipreg.h.
#define STATUS_DM_RS_SUSPENDED 0x000c0000 /* Suspended */ |
Definition at line 540 of file tulipreg.h.
#define STATUS_DM_RS_WAIT 0x00040000 /* Running - wait for packet */ |
Definition at line 532 of file tulipreg.h.
#define STATUS_DM_TS_CLOSE_OWN |
Definition at line 564 of file tulipreg.h.
#define STATUS_DM_TS_CLOSE_ST |
Definition at line 568 of file tulipreg.h.
#define STATUS_DM_TS_FETCH |
Definition at line 558 of file tulipreg.h.
#define STATUS_DM_TS_READING |
Definition at line 561 of file tulipreg.h.
#define STATUS_DM_TS_SETUP 0x00200000 /* Running - Setup packet */ |
Definition at line 560 of file tulipreg.h.
#define STATUS_DM_TS_STOPPED 0x00000000 /* Stopped */ |
Definition at line 557 of file tulipreg.h.
#define STATUS_DM_TS_SUSPENDED 0x00700000 /* Suspended */ |
Definition at line 570 of file tulipreg.h.
#define STATUS_DM_TS_WAIT |
Definition at line 566 of file tulipreg.h.
#define STATUS_EB 0x03800000 /* error bits */ |
Definition at line 571 of file tulipreg.h.
#define STATUS_EB_MABT 0x00800000 /* master abort */ |
Definition at line 573 of file tulipreg.h.
#define STATUS_EB_PARITY 0x00000000 /* parity errror */ |
Definition at line 572 of file tulipreg.h.
#define STATUS_EB_TABT 0x01000000 /* target abort */ |
Definition at line 574 of file tulipreg.h.
#define STATUS_ER 0x00004000 /* early receive (21041) */ |
Definition at line 511 of file tulipreg.h.
#define STATUS_ETI |
Definition at line 504 of file tulipreg.h.
#define STATUS_FD |
Definition at line 506 of file tulipreg.h.
#define STATUS_GPPI 0x04000000 /* GPIO interrupt (21142) */ |
Definition at line 575 of file tulipreg.h.
#define STATUS_LC |
Definition at line 577 of file tulipreg.h.
#define STATUS_LNF 0x00001000 /* link fail (21040) */ |
Definition at line 509 of file tulipreg.h.
#define STATUS_LNPANC 0x00000010 /* link pass (21041) */ |
Definition at line 495 of file tulipreg.h.
#define STATUS_NIS 0x00010000 /* normal interrupt summary */ |
Definition at line 513 of file tulipreg.h.
Referenced by DEVICE_TICK().
#define STATUS_PMAC_WKUPI 0x10000000 /* wake up event */ |
Definition at line 579 of file tulipreg.h.
#define STATUS_PNIC_TXABORT 0x04000000 /* transmit aborted */ |
Definition at line 576 of file tulipreg.h.
#define STATUS_RI 0x00000040 /* receive interrupt */ |
Definition at line 498 of file tulipreg.h.
Referenced by dec21143_rx().
#define STATUS_RPS 0x00000100 /* receive process stopped */ |
Definition at line 500 of file tulipreg.h.
#define STATUS_RS 0x000e0000 /* receive process state */ |
Definition at line 514 of file tulipreg.h.
Referenced by dec21143_rx().
#define STATUS_RS_CHECK |
Definition at line 518 of file tulipreg.h.
#define STATUS_RS_CLOSE |
Definition at line 522 of file tulipreg.h.
#define STATUS_RS_FETCH |
Definition at line 516 of file tulipreg.h.
#define STATUS_RS_FLUSH |
Definition at line 524 of file tulipreg.h.
#define STATUS_RS_QUEUE |
Definition at line 526 of file tulipreg.h.
#define STATUS_RS_STOPPED 0x00000000 /* Stopped */ |
Definition at line 515 of file tulipreg.h.
#define STATUS_RS_SUSPENDED 0x00080000 /* Suspended */ |
Definition at line 521 of file tulipreg.h.
#define STATUS_RS_WAIT 0x00060000 /* Running - wait for packet */ |
Definition at line 520 of file tulipreg.h.
#define STATUS_RU 0x00000080 /* receive buffer unavail */ |
Definition at line 499 of file tulipreg.h.
Referenced by dec21143_rx().
#define STATUS_RWT 0x00000200 /* receive watchdog timeout */ |
Definition at line 501 of file tulipreg.h.
#define STATUS_SE 0x00002000 /* system error */ |
Definition at line 510 of file tulipreg.h.
#define STATUS_TI 0x00000001 /* transmit interrupt */ |
Definition at line 490 of file tulipreg.h.
Referenced by dec21143_tx().
#define STATUS_TJT 0x00000008 /* transmit jabber timeout */ |
Definition at line 493 of file tulipreg.h.
#define STATUS_TM 0x00000800 /* timer expired (21041) */ |
Definition at line 508 of file tulipreg.h.
#define STATUS_TPS 0x00000002 /* transmit process stopped */ |
Definition at line 491 of file tulipreg.h.
#define STATUS_TS 0x00700000 /* transmit process state */ |
Definition at line 543 of file tulipreg.h.
Referenced by dec21143_tx().
#define STATUS_TS_CLOSE |
Definition at line 555 of file tulipreg.h.
#define STATUS_TS_FETCH |
Definition at line 545 of file tulipreg.h.
#define STATUS_TS_READING |
Definition at line 549 of file tulipreg.h.
#define STATUS_TS_RESERVED 0x00400000 /* RESERVED */ |
Definition at line 552 of file tulipreg.h.
#define STATUS_TS_SETUP 0x00500000 /* Running - Setup packet */ |
Definition at line 553 of file tulipreg.h.
#define STATUS_TS_STOPPED 0x00000000 /* Stopped */ |
Definition at line 544 of file tulipreg.h.
#define STATUS_TS_SUSPENDED 0x00600000 /* Suspended */ |
Definition at line 554 of file tulipreg.h.
#define STATUS_TS_WAIT |
Definition at line 547 of file tulipreg.h.
#define STATUS_TU 0x00000004 /* transmit buffer unavail */ |
Definition at line 492 of file tulipreg.h.
Referenced by dec21143_tx().
#define STATUS_UNF 0x00000020 /* transmit underflow */ |
Definition at line 497 of file tulipreg.h.
#define STATUS_WINB_REI 0x00000008 /* receive early interrupt */ |
Definition at line 494 of file tulipreg.h.
#define STATUS_WINB_RERR 0x00000010 /* receive error */ |
Definition at line 496 of file tulipreg.h.
#define STATUS_X3201_PMEIS |
Definition at line 580 of file tulipreg.h.
#define STATUS_X3201_SFIS |
Definition at line 582 of file tulipreg.h.
#define TDCTL_CH 0x01000000 /* Second Address Chained */ |
Definition at line 235 of file tulipreg.h.
Referenced by dec21143_rx(), and dec21143_tx().
#define TDCTL_ER 0x02000000 /* End of Ring */ |
Definition at line 234 of file tulipreg.h.
Referenced by dec21143_rx(), and dec21143_tx().
#define TDCTL_SIZE1 0x000007ff /* Size of buffer 1 */ |
Definition at line 228 of file tulipreg.h.
Referenced by dec21143_rx(), and dec21143_tx().
#define TDCTL_SIZE1_SHIFT 0 |
Definition at line 229 of file tulipreg.h.
#define TDCTL_SIZE2 0x003ff800 /* Size of buffer 2 */ |
Definition at line 231 of file tulipreg.h.
Referenced by dec21143_rx(), and dec21143_tx().
#define TDCTL_SIZE2_SHIFT 11 |
Definition at line 232 of file tulipreg.h.
Referenced by dec21143_rx(), and dec21143_tx().
#define TDCTL_Tx_AC 0x04000000 /* Add CRC Disable */ |
Definition at line 245 of file tulipreg.h.
#define TDCTL_Tx_DPD 0x00800000 /* Disabled Padding */ |
Definition at line 246 of file tulipreg.h.
#define TDCTL_Tx_FS 0x20000000 /* First Segment */ |
Definition at line 242 of file tulipreg.h.
Referenced by dec21143_tx().
#define TDCTL_Tx_FT0 0x00400000 /* Filtering Type 0 */ |
Definition at line 247 of file tulipreg.h.
#define TDCTL_Tx_FT1 0x10000000 /* Filtering Type 1 */ |
Definition at line 243 of file tulipreg.h.
#define TDCTL_Tx_FT_HASH TDCTL_Tx_FT0 |
Definition at line 282 of file tulipreg.h.
#define TDCTL_Tx_FT_HASHONLY (TDCTL_Tx_FT1|TDCTL_Tx_FT0) |
Definition at line 284 of file tulipreg.h.
#define TDCTL_Tx_FT_INVERSE TDCTL_Tx_FT1 |
Definition at line 283 of file tulipreg.h.
#define TDCTL_Tx_FT_PERFECT 0 |
Definition at line 281 of file tulipreg.h.
#define TDCTL_Tx_IC 0x80000000 /* Interrupt on Completion */ |
Definition at line 240 of file tulipreg.h.
Referenced by dec21143_tx().
#define TDCTL_Tx_LS 0x40000000 /* Last Segment */ |
Definition at line 241 of file tulipreg.h.
Referenced by dec21143_tx().
#define TDCTL_Tx_SET 0x08000000 /* Setup Packet */ |
Definition at line 244 of file tulipreg.h.
Referenced by dec21143_tx().
#define TDSTAT_ES 0x00008000 /* Error Summary */ |
Definition at line 178 of file tulipreg.h.
Referenced by dec21143_tx().
#define TDSTAT_OWN 0x80000000 /* Tulip owns descriptor */ |
Definition at line 177 of file tulipreg.h.
Referenced by dec21143_rx(), and dec21143_tx().
#define TDSTAT_Rx_CE 0x00000002 /* CRC Error */ |
Definition at line 198 of file tulipreg.h.
#define TDSTAT_Rx_CS 0x00000040 /* Collision Seen */ |
Definition at line 193 of file tulipreg.h.
#define TDSTAT_Rx_DB 0x00000004 /* Dribbling Bit */ |
Definition at line 197 of file tulipreg.h.
#define TDSTAT_Rx_DE 0x00004000 /* Descriptor Error */ |
Definition at line 186 of file tulipreg.h.
#define TDSTAT_Rx_DT 0x00003000 /* Data Type */ |
Definition at line 187 of file tulipreg.h.
#define TDSTAT_Rx_DT_EL 0x00002000 /* External Loopback Frame */ |
Definition at line 205 of file tulipreg.h.
#define TDSTAT_Rx_DT_IL 0x00001000 /* Internal Loopback Frame */ |
Definition at line 204 of file tulipreg.h.
#define TDSTAT_Rx_DT_r 0x00003000 /* Reserved */ |
Definition at line 206 of file tulipreg.h.
#define TDSTAT_Rx_DT_SR 0x00000000 /* Serial Received Frame */ |
Definition at line 203 of file tulipreg.h.
#define TDSTAT_Rx_FF 0x40000000 /* Filtering Fail */ |
Definition at line 183 of file tulipreg.h.
#define TDSTAT_Rx_FL 0x3fff0000 /* Frame Length including CRC */ |
Definition at line 185 of file tulipreg.h.
Referenced by dec21143_rx().
#define TDSTAT_Rx_FS 0x00000200 /* First Descriptor */ |
Definition at line 190 of file tulipreg.h.
Referenced by dec21143_rx().
#define TDSTAT_Rx_LENGTH | ( | x | ) | (((x) & TDSTAT_Rx_FL) >> 16) |
Definition at line 201 of file tulipreg.h.
#define TDSTAT_Rx_LS 0x00000100 /* Last Descriptor */ |
Definition at line 191 of file tulipreg.h.
Referenced by dec21143_rx().
#define TDSTAT_Rx_MF 0x00000400 /* Multicast Frame */ |
Definition at line 189 of file tulipreg.h.
#define TDSTAT_Rx_RE 0x00000008 /* Report on MII Error */ |
Definition at line 196 of file tulipreg.h.
#define TDSTAT_Rx_RF 0x00000800 /* Runt Frame */ |
Definition at line 188 of file tulipreg.h.
#define TDSTAT_Rx_RT 0x00000020 /* Frame Type */ |
Definition at line 194 of file tulipreg.h.
#define TDSTAT_Rx_RW 0x00000010 /* Receive Watchdog */ |
Definition at line 195 of file tulipreg.h.
#define TDSTAT_Rx_TL 0x00000080 /* Frame Too Long */ |
Definition at line 192 of file tulipreg.h.
Referenced by dec21143_rx().
#define TDSTAT_Rx_ZER 0x00000001 /* Zero (always 0) */ |
Definition at line 199 of file tulipreg.h.
#define TDSTAT_Tx_CC 0x00000078 /* Collision Count */ |
Definition at line 218 of file tulipreg.h.
#define TDSTAT_Tx_COLLISIONS | ( | x | ) | (((x) & TDSTAT_Tx_CC) >> 3) |
Definition at line 223 of file tulipreg.h.
#define TDSTAT_Tx_DE 0x00000001 /* Deferred */ |
Definition at line 221 of file tulipreg.h.
#define TDSTAT_Tx_EC 0x00000100 /* Excessive Collisions */ |
Definition at line 216 of file tulipreg.h.
Referenced by dec21143_tx().
#define TDSTAT_Tx_HF 0x00000080 /* Heartbeat Fail */ |
Definition at line 217 of file tulipreg.h.
#define TDSTAT_Tx_LC 0x00000200 /* Late Collision */ |
Definition at line 215 of file tulipreg.h.
Referenced by dec21143_tx().
#define TDSTAT_Tx_LF 0x00000004 /* Link Fail */ |
Definition at line 219 of file tulipreg.h.
#define TDSTAT_Tx_LO 0x00000800 /* Loss of Carrier */ |
Definition at line 213 of file tulipreg.h.
Referenced by dec21143_tx().
#define TDSTAT_Tx_NC 0x00000400 /* No Carrier */ |
Definition at line 214 of file tulipreg.h.
Referenced by dec21143_tx().
#define TDSTAT_Tx_TO 0x00004000 /* Transmit Jabber Timeout */ |
Definition at line 212 of file tulipreg.h.
Referenced by dec21143_tx().
#define TDSTAT_Tx_UF 0x00000002 /* Underflow Error */ |
Definition at line 220 of file tulipreg.h.
Referenced by dec21143_tx().
#define TDSTAT_WINB_Rx_RCMP 0x40000000 /* Receive Complete */ |
Definition at line 184 of file tulipreg.h.
#define TDSTAT_WINB_Tx_TE 0x00008000 /* Transmit Error */ |
Definition at line 211 of file tulipreg.h.
#define TULIP_CSR0 0x00 |
Definition at line 391 of file tulipreg.h.
#define TULIP_CSR1 0x08 |
Definition at line 392 of file tulipreg.h.
#define TULIP_CSR10 0x50 |
Definition at line 401 of file tulipreg.h.
#define TULIP_CSR11 0x58 |
Definition at line 402 of file tulipreg.h.
#define TULIP_CSR12 0x60 |
Definition at line 403 of file tulipreg.h.
#define TULIP_CSR13 0x68 |
Definition at line 404 of file tulipreg.h.
#define TULIP_CSR14 0x70 |
Definition at line 405 of file tulipreg.h.
#define TULIP_CSR15 0x78 |
Definition at line 406 of file tulipreg.h.
#define TULIP_CSR16 0x80 |
Definition at line 407 of file tulipreg.h.
#define TULIP_CSR17 0x88 |
Definition at line 408 of file tulipreg.h.
#define TULIP_CSR18 0x90 |
Definition at line 409 of file tulipreg.h.
#define TULIP_CSR19 0x98 |
Definition at line 410 of file tulipreg.h.
#define TULIP_CSR2 0x10 |
Definition at line 393 of file tulipreg.h.
#define TULIP_CSR20 0xa0 |
Definition at line 411 of file tulipreg.h.
#define TULIP_CSR21 0xa8 |
Definition at line 412 of file tulipreg.h.
#define TULIP_CSR22 0xb0 |
Definition at line 413 of file tulipreg.h.
#define TULIP_CSR23 0xb8 |
Definition at line 414 of file tulipreg.h.
#define TULIP_CSR24 0xc0 |
Definition at line 415 of file tulipreg.h.
#define TULIP_CSR25 0xc8 |
Definition at line 416 of file tulipreg.h.
#define TULIP_CSR26 0xd0 |
Definition at line 417 of file tulipreg.h.
#define TULIP_CSR27 0xd8 |
Definition at line 418 of file tulipreg.h.
#define TULIP_CSR28 0xe0 |
Definition at line 419 of file tulipreg.h.
#define TULIP_CSR29 0xe8 |
Definition at line 420 of file tulipreg.h.
#define TULIP_CSR3 0x18 |
Definition at line 394 of file tulipreg.h.
#define TULIP_CSR30 0xf0 |
Definition at line 421 of file tulipreg.h.
#define TULIP_CSR31 0xf8 |
Definition at line 422 of file tulipreg.h.
#define TULIP_CSR4 0x20 |
Definition at line 395 of file tulipreg.h.
#define TULIP_CSR5 0x28 |
Definition at line 396 of file tulipreg.h.
#define TULIP_CSR6 0x30 |
Definition at line 397 of file tulipreg.h.
#define TULIP_CSR7 0x38 |
Definition at line 398 of file tulipreg.h.
#define TULIP_CSR8 0x40 |
Definition at line 399 of file tulipreg.h.
#define TULIP_CSR9 0x48 |
Definition at line 400 of file tulipreg.h.
Definition at line 424 of file tulipreg.h.
#define TULIP_MAX_ROM_SIZE 512 |
Definition at line 295 of file tulipreg.h.
#define TULIP_MAXADDRS 16 |
Definition at line 287 of file tulipreg.h.
#define TULIP_MCHASHSIZE 512 |
Definition at line 288 of file tulipreg.h.
#define TULIP_PNICII_HASHSIZE 128 |
Definition at line 289 of file tulipreg.h.
#define TULIP_ROM_CHIP_COUNT 19 /* B */ |
Definition at line 321 of file tulipreg.h.
#define TULIP_ROM_CHIPn_DEVICE_NUMBER | ( | n | ) | (26 + ((n) * 3))/* B */ |
Definition at line 323 of file tulipreg.h.
#define TULIP_ROM_CHIPn_INFO_LEAF_OFFSET | ( | n | ) | (27 + ((n) * 3))/* W */ |
Definition at line 324 of file tulipreg.h.
#define TULIP_ROM_CRC32_CHECKSUM 126 /* W */ |
Definition at line 325 of file tulipreg.h.
#define TULIP_ROM_CRC32_CHECKSUM1 94 /* W */ |
Definition at line 326 of file tulipreg.h.
#define TULIP_ROM_GETW | ( | data, | |
off | |||
) |
Definition at line 384 of file tulipreg.h.
#define TULIP_ROM_IEEE_NETWORK_ADDRESS 20 |
Definition at line 322 of file tulipreg.h.
#define TULIP_ROM_IL_MEDIA_COUNT 2 /* B */ |
Definition at line 329 of file tulipreg.h.
#define TULIP_ROM_IL_MEDIAn_BLOCK_BASE 3 |
Definition at line 330 of file tulipreg.h.
#define TULIP_ROM_IL_SELECT_CONN_TYPE 0 /* W */ |
Definition at line 328 of file tulipreg.h.
#define TULIP_ROM_MB_21140_GPR 0 /* 21140[A] GPR block */ |
Definition at line 377 of file tulipreg.h.
#define TULIP_ROM_MB_21140_MII 1 /* 21140[A] MII block */ |
Definition at line 378 of file tulipreg.h.
#define TULIP_ROM_MB_21142_MII 3 /* 2114[23] MII block */ |
Definition at line 380 of file tulipreg.h.
#define TULIP_ROM_MB_21142_SIA 2 /* 2114[23] SIA block */ |
Definition at line 379 of file tulipreg.h.
#define TULIP_ROM_MB_21143_RESET 5 /* 21143 reset block */ |
Definition at line 382 of file tulipreg.h.
#define TULIP_ROM_MB_21143_SYM 4 /* 21143 SYM block */ |
Definition at line 381 of file tulipreg.h.
#define TULIP_ROM_MB_BITPOS | ( | x | ) | (1 << (((x) & 0x0e) >> 1)) |
Definition at line 375 of file tulipreg.h.
#define TULIP_ROM_MB_CSR13 1 /* W */ |
Definition at line 365 of file tulipreg.h.
#define TULIP_ROM_MB_CSR14 3 /* W */ |
Definition at line 366 of file tulipreg.h.
#define TULIP_ROM_MB_CSR15 5 /* W */ |
Definition at line 367 of file tulipreg.h.
#define TULIP_ROM_MB_DEFAULT 0x4000 |
Definition at line 372 of file tulipreg.h.
#define TULIP_ROM_MB_EXT 0x40 |
Definition at line 363 of file tulipreg.h.
#define TULIP_ROM_MB_MEDIA_100FX 0x07 |
Definition at line 360 of file tulipreg.h.
#define TULIP_ROM_MB_MEDIA_100FX_FDX 0x08 |
Definition at line 361 of file tulipreg.h.
#define TULIP_ROM_MB_MEDIA_100T4 0x06 |
Definition at line 359 of file tulipreg.h.
#define TULIP_ROM_MB_MEDIA_100TX 0x03 |
Definition at line 356 of file tulipreg.h.
#define TULIP_ROM_MB_MEDIA_100TX_FDX 0x05 |
Definition at line 358 of file tulipreg.h.
#define TULIP_ROM_MB_MEDIA_AUI 0x02 |
Definition at line 355 of file tulipreg.h.
#define TULIP_ROM_MB_MEDIA_BNC 0x01 |
Definition at line 354 of file tulipreg.h.
#define TULIP_ROM_MB_MEDIA_CODE 0x3f |
Definition at line 352 of file tulipreg.h.
#define TULIP_ROM_MB_MEDIA_TP 0x00 |
Definition at line 353 of file tulipreg.h.
#define TULIP_ROM_MB_MEDIA_TP_FDX 0x04 |
Definition at line 357 of file tulipreg.h.
#define TULIP_ROM_MB_NOINDICATOR 0x8000 |
Definition at line 371 of file tulipreg.h.
#define TULIP_ROM_MB_OPMODE | ( | x | ) | (((x) & 0x71) << 18) |
Definition at line 374 of file tulipreg.h.
#define TULIP_ROM_MB_POLARITY 0x0080 |
Definition at line 373 of file tulipreg.h.
#define TULIP_ROM_MB_SIZE | ( | mc | ) | (((mc) & TULIP_ROM_MB_EXT) ? 7 : 1) |
Definition at line 369 of file tulipreg.h.
#define TULIP_ROM_SIZE | ( | bits | ) | (2 << (bits)) |
Definition at line 294 of file tulipreg.h.
#define TULIP_ROM_SROM_FORMAT_VERION 18 /* B */ |
Definition at line 320 of file tulipreg.h.
#define TULIP_SETUP_PACKET_LEN 192 |
Definition at line 286 of file tulipreg.h.
#define TULIP_SROM_OPC_ERASE 0x04 |
Definition at line 713 of file tulipreg.h.
#define TULIP_SROM_OPC_READ 0x06 |
Definition at line 715 of file tulipreg.h.
#define TULIP_SROM_OPC_WRITE 0x05 |
Definition at line 714 of file tulipreg.h.
#define TXPOLL_TPD 0x00000001 /* transmit poll demand */ |
Definition at line 474 of file tulipreg.h.
#define WINB_CBRCR_128K 0x00000006 /* 128k */ |
Definition at line 1293 of file tulipreg.h.
#define WINB_CBRCR_16K 0x00000003 /* 16k */ |
Definition at line 1290 of file tulipreg.h.
#define WINB_CBRCR_256K 0x00000007 |
Definition at line 1294 of file tulipreg.h.
#define WINB_CBRCR_32K 0x00000004 /* 32k */ |
Definition at line 1291 of file tulipreg.h.
#define WINB_CBRCR_64K 0x00000005 /* 64k */ |
Definition at line 1292 of file tulipreg.h.
#define WINB_CBRCR_8K 0x00000002 /* 8k */ |
Definition at line 1289 of file tulipreg.h.
#define WINB_CBRCR_NONE 0x00000000 /* no boot rom */ |
Definition at line 1287 of file tulipreg.h.
#define X3201_PMR_EDEN 0x00000100 /* energy detect enable */ |
Definition at line 1517 of file tulipreg.h.
#define X3201_PMR_EDES 0x01000000 /* ED event status */ |
Definition at line 1525 of file tulipreg.h.
#define X3201_PMR_EDINT 0x0000000f /* energy detect interval */ |
Definition at line 1516 of file tulipreg.h.
#define X3201_PMR_EP 0x00010000 /* energy present */ |
Definition at line 1523 of file tulipreg.h.
#define X3201_PMR_GP0ES 0x10000000 /* GP0 event status */ |
Definition at line 1529 of file tulipreg.h.
#define X3201_PMR_LCES 0x20000000 /* LC event status */ |
Definition at line 1530 of file tulipreg.h.
#define X3201_PMR_LP 0x00200000 /* link present */ |
Definition at line 1524 of file tulipreg.h.
#define X3201_PMR_MPEN 0x00000200 /* magic packet enable */ |
Definition at line 1518 of file tulipreg.h.
#define X3201_PMR_MPES 0x02000000 /* MP event status */ |
Definition at line 1526 of file tulipreg.h.
#define X3201_PMR_PMGP0EN 0x00001000 /* GP0 change enable */ |
Definition at line 1520 of file tulipreg.h.
#define X3201_PMR_PMLCEN 0x00002000 /* link change enable */ |
Definition at line 1521 of file tulipreg.h.
#define X3201_PMR_WOLEN 0x00000400 /* Wake On Lan enable */ |
Definition at line 1519 of file tulipreg.h.
#define X3201_PMR_WOLES 0x04000000 /* WOL event status */ |
Definition at line 1527 of file tulipreg.h.
#define X3201_PMR_WOLPS 0x08000000 /* WOL process status */ |
Definition at line 1528 of file tulipreg.h.
#define X3201_PMR_WOLTMEN 0x00008000 /* WOL template mem enable */ |
Definition at line 1522 of file tulipreg.h.