pcmciareg.h Source File
Back to the index.
Go to the documentation of this file. 45 #define PCMCIA_CISTPL_NULL 0x00 46 #define PCMCIA_CISTPL_DEVICE 0x01 47 #define PCMCIA_DTYPE_MASK 0xF0 48 #define PCMCIA_DTYPE_NULL 0x00 49 #define PCMCIA_DTYPE_ROM 0x10 50 #define PCMCIA_DTYPE_OTPROM 0x20 51 #define PCMCIA_DTYPE_EPROM 0x30 52 #define PCMCIA_DTYPE_EEPROM 0x40 53 #define PCMCIA_DTYPE_FLASH 0x50 54 #define PCMCIA_DTYPE_SRAM 0x60 55 #define PCMCIA_DTYPE_DRAM 0x70 56 #define PCMCIA_DTYPE_FUNCSPEC 0xD0 57 #define PCMCIA_DTYPE_EXTEND 0xE0 58 #define PCMCIA_DSPEED_MASK 0x07 59 #define PCMCIA_DSPEED_NULL 0x00 60 #define PCMCIA_DSPEED_250NS 0x01 61 #define PCMCIA_DSPEED_200NS 0x02 62 #define PCMCIA_DSPEED_150NS 0x03 63 #define PCMCIA_DSPEED_100NS 0x04 64 #define PCMCIA_DSPEED_EXT 0x07 73 #define PCMCIA_CISTPL_LONGLINK_CB 0x02 74 #define PCMCIA_CISTPL_INDIRECT 0x03 75 #define PCMCIA_CISTPL_CONFIG_CB 0x04 76 #define PCMCIA_CISTPL_CFTABLE_ENTRY_CB 0x05 77 #define PCMCIA_CISTPL_LONGLINK_MFC 0x06 78 #define PCMCIA_MFC_MEM_ATTR 0x00 79 #define PCMCIA_MFC_MEM_COMMON 0x01 80 #define PCMCIA_CISTPL_BAR 0x07 81 #define PCMCIA_CISTPL_PWR_MGMNT 0x08 83 #define PCMCIA_CISTPL_CHECKSUM 0x10 84 #define PCMCIA_CISTPL_LONGLINK_A 0x11 85 #define PCMCIA_CISTPL_LONGLINK_C 0x12 86 #define PCMCIA_CISTPL_LINKTARGET 0x13 87 #define PCMCIA_CISTPL_NO_LINK 0x14 88 #define PCMCIA_CISTPL_VERS_1 0x15 89 #define PCMCIA_CISTPL_ALTSTR 0x16 90 #define PCMCIA_CISTPL_DEVICE_A 0x17 91 #define PCMCIA_CISTPL_JEDEC_C 0x18 92 #define PCMCIA_CISTPL_JEDEC_A 0x19 93 #define PCMCIA_CISTPL_CONFIG 0x1A 94 #define PCMCIA_TPCC_RASZ_MASK 0x03 95 #define PCMCIA_TPCC_RASZ_SHIFT 0 96 #define PCMCIA_TPCC_RMSZ_MASK 0x3C 97 #define PCMCIA_TPCC_RMSZ_SHIFT 2 98 #define PCMCIA_TPCC_RFSZ_MASK 0xC0 99 #define PCMCIA_TPCC_RFSZ_SHIFT 6 100 #define PCMCIA_CISTPL_CFTABLE_ENTRY 0x1B 101 #define PCMCIA_TPCE_INDX_INTFACE 0x80 102 #define PCMCIA_TPCE_INDX_DEFAULT 0x40 103 #define PCMCIA_TPCE_INDX_NUM_MASK 0x3F 104 #define PCMCIA_TPCE_IF_MWAIT 0x80 105 #define PCMCIA_TPCE_IF_RDYBSY 0x40 106 #define PCMCIA_TPCE_IF_WP 0x20 107 #define PCMCIA_TPCE_IF_BVD 0x10 108 #define PCMCIA_TPCE_IF_IFTYPE 0x0F 109 #define PCMCIA_IFTYPE_MEMORY 0 110 #define PCMCIA_IFTYPE_IO 1 111 #define PCMCIA_TPCE_FS_MISC 0x80 112 #define PCMCIA_TPCE_FS_MEMSPACE_MASK 0x60 113 #define PCMCIA_TPCE_FS_MEMSPACE_NONE 0x00 114 #define PCMCIA_TPCE_FS_MEMSPACE_LENGTH 0x20 115 #define PCMCIA_TPCE_FS_MEMSPACE_LENGTHADDR 0x40 116 #define PCMCIA_TPCE_FS_MEMSPACE_TABLE 0x60 117 #define PCMCIA_TPCE_FS_IRQ 0x10 118 #define PCMCIA_TPCE_FS_IOSPACE 0x08 119 #define PCMCIA_TPCE_FS_TIMING 0x04 120 #define PCMCIA_TPCE_FS_POWER_MASK 0x03 121 #define PCMCIA_TPCE_FS_POWER_NONE 0x00 122 #define PCMCIA_TPCE_FS_POWER_VCC 0x01 123 #define PCMCIA_TPCE_FS_POWER_VCCVPP1 0x02 124 #define PCMCIA_TPCE_FS_POWER_VCCVPP1VPP2 0x03 125 #define PCMCIA_TPCE_TD_RESERVED_MASK 0xE0 126 #define PCMCIA_TPCE_TD_RDYBSY_MASK 0x1C 127 #define PCMCIA_TPCE_TD_WAIT_MASK 0x03 128 #define PCMCIA_TPCE_IO_HASRANGE 0x80 129 #define PCMCIA_TPCE_IO_BUSWIDTH_16BIT 0x40 130 #define PCMCIA_TPCE_IO_BUSWIDTH_8BIT 0x20 131 #define PCMCIA_TPCE_IO_IOADDRLINES_MASK 0x1F 132 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_MASK 0xC0 133 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_NONE 0x00 134 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_ONE 0x40 135 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_TWO 0x80 136 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_FOUR 0xC0 137 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_MASK 0x30 138 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_NONE 0x00 139 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_ONE 0x10 140 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_TWO 0x20 141 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_FOUR 0x30 142 #define PCMCIA_TPCE_IO_RANGE_COUNT 0x0F 143 #define PCMCIA_TPCE_IR_SHARE 0x80 144 #define PCMCIA_TPCE_IR_PULSE 0x40 145 #define PCMCIA_TPCE_IR_LEVEL 0x20 146 #define PCMCIA_TPCE_IR_HASMASK 0x10 147 #define PCMCIA_TPCE_IR_IRQ 0x0F 148 #define PCMCIA_TPCE_MS_HOSTADDR 0x80 149 #define PCMCIA_TPCE_MS_CARDADDR_SIZE_MASK 0x60 150 #define PCMCIA_TPCE_MS_CARDADDR_SIZE_SHIFT 5 151 #define PCMCIA_TPCE_MS_LENGTH_SIZE_MASK 0x18 152 #define PCMCIA_TPCE_MS_LENGTH_SIZE_SHIFT 3 153 #define PCMCIA_TPCE_MS_COUNT 0x07 154 #define PCMCIA_TPCE_MI_EXT 0x80 155 #define PCMCIA_TPCE_MI_RESERVED 0x40 156 #define PCMCIA_TPCE_MI_PWRDOWN 0x20 157 #define PCMCIA_TPCE_MI_READONLY 0x10 158 #define PCMCIA_TPCE_MI_AUDIO 0x08 159 #define PCMCIA_TPCE_MI_MAXTWINS 0x07 160 #define PCMCIA_CISTPL_DEVICE_OC 0x1C 161 #define PCMCIA_CISTPL_DEVICE_OA 0x1D 162 #define PCMCIA_CISTPL_DEVICE_GEO 0x1E 163 #define PCMCIA_CISTPL_DEVICE_GEO_A 0x1F 164 #define PCMCIA_CISTPL_MANFID 0x20 165 #define PCMCIA_CISTPL_FUNCID 0x21 166 #define PCMCIA_FUNCTION_UNSPEC -1 167 #define PCMCIA_FUNCTION_MULTIFUNCTION 0 168 #define PCMCIA_FUNCTION_MEMORY 1 169 #define PCMCIA_FUNCTION_SERIAL 2 170 #define PCMCIA_FUNCTION_PARALLEL 3 171 #define PCMCIA_FUNCTION_DISK 4 172 #define PCMCIA_FUNCTION_VIDEO 5 173 #define PCMCIA_FUNCTION_NETWORK 6 174 #define PCMCIA_FUNCTION_AIMS 7 175 #define PCMCIA_FUNCTION_SCSI 8 176 #define PCMCIA_FUNCTION_SECURITY 9 177 #define PCMCIA_FUNCTION_INSTRUMENT 10 178 #define PCMCIA_CISTPL_FUNCE 0x22 179 #define PCMCIA_TPLFE_TYPE_LAN_TECH 0x01 180 #define PCMCIA_TPLFE_TYPE_LAN_SPEED 0x02 181 #define PCMCIA_TPLFE_TYPE_LAN_MEDIA 0x03 182 #define PCMCIA_TPLFE_TYPE_LAN_NID 0x04 183 #define PCMCIA_TPLFE_TYPE_LAN_CONN 0x05 184 #define PCMCIA_TPLFE_TYPE_DISK_DEVICE_INTERFACE 0x01 185 #define PCMCIA_TPLFE_DDI_PCCARD_ATA 0x01 186 #define PCMCIA_CISTPL_END 0xFF 190 #define PCMCIA_CISTPL_SWIL 0x23 192 #define PCMCIA_CISTPL_VERS_2 0x40 193 #define PCMCIA_CISTPL_FORMAT 0x41 194 #define PCMCIA_CISTPL_GEOMETRY 0x42 195 #define PCMCIA_CISTPL_BYTEORDER 0x43 196 #define PCMCIA_CISTPL_DATE 0x44 197 #define PCMCIA_CISTPL_BATTERY 0x45 198 #define PCMCIA_CISTPL_FORAMT_A 0x47 202 #define PCMCIA_CISTPL_ORG 0x46 208 #define PCMCIA_CISTPL_SPCL 0x90 215 #define PCMCIA_CCR_OPTION 0x00 216 #define PCMCIA_CCR_OPTION_SRESET 0x80 217 #define PCMCIA_CCR_OPTION_LEVIREQ 0x40 218 #define PCMCIA_CCR_OPTION_CFINDEX 0x3F 219 #define PCMCIA_CCR_OPTION_IREQ_ENABLE 0x04 220 #define PCMCIA_CCR_OPTION_ADDR_DECODE 0x02 221 #define PCMCIA_CCR_OPTION_FUNC_ENABLE 0x01 222 #define PCMCIA_CCR_STATUS 0x02 223 #define PCMCIA_CCR_STATUS_PINCHANGED 0x80 224 #define PCMCIA_CCR_STATUS_SIGCHG 0x40 225 #define PCMCIA_CCR_STATUS_IOIS8 0x20 226 #define PCMCIA_CCR_STATUS_RESERVED1 0x10 227 #define PCMCIA_CCR_STATUS_AUDIO 0x08 228 #define PCMCIA_CCR_STATUS_PWRDWN 0x04 229 #define PCMCIA_CCR_STATUS_INTR 0x02 230 #define PCMCIA_CCR_STATUS_INTRACK 0x01 231 #define PCMCIA_CCR_PIN 0x04 232 #define PCMCIA_CCR_PIN_CBVD1 0x80 233 #define PCMCIA_CCR_PIN_CBVD2 0x40 234 #define PCMCIA_CCR_PIN_CRDYBSY 0x20 235 #define PCMCIA_CCR_PIN_CWPROT 0x10 236 #define PCMCIA_CCR_PIN_RBVD1 0x08 237 #define PCMCIA_CCR_PIN_RBVD2 0x04 238 #define PCMCIA_CCR_PIN_RRDYBSY 0x02 239 #define PCMCIA_CCR_PIN_RWPROT 0x01 240 #define PCMCIA_CCR_SOCKETCOPY 0x06 241 #define PCMCIA_CCR_SOCKETCOPY_RESERVED 0x80 242 #define PCMCIA_CCR_SOCKETCOPY_COPY_MASK 0x70 243 #define PCMCIA_CCR_SOCKETCOPY_COPY_SHIFT 4 244 #define PCMCIA_CCR_SOCKETCOPY_SOCKET_MASK 0x0F 245 #define PCMCIA_CCR_EXTSTATUS 0x08 246 #define PCMCIA_CCR_IOBASE0 0x0A 247 #define PCMCIA_CCR_IOBASE1 0x0C 248 #define PCMCIA_CCR_IOBASE2 0x0E 249 #define PCMCIA_CCR_IOBASE3 0x10 250 #define PCMCIA_CCR_IOSIZE 0x12 252 #define PCMCIA_CCR_SIZE 0x14
Generated on Sun Sep 30 2018 16:05:18 for GXemul by
1.8.13