sh4_scireg.h Source File

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sh4_scireg.h
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1 /* $OpenBSD: scireg.h,v 1.1.1.1 2006/10/06 21:02:55 miod Exp $ */
2 /* $NetBSD: scireg.h,v 1.8 2003/07/01 11:49:37 uwe Exp $ */
3 
4 #ifndef SH4_SCIREG_H
5 #define SH4_SCIREG_H
6 
7 /* GXemul base address for SCI-connected devices: */
8 #define SCI_DEVICE_BASE 0x110000000ULL
9 
10 
11 /*-
12  * Copyright (C) 1999 SAITOH Masanobu. All rights reserved.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions
16  * are met:
17  * 1. Redistributions of source code must retain the above copyright
18  * notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  * notice, this list of conditions and the following disclaimer in the
21  * documentation and/or other materials provided with the distribution.
22  * 3. The name of the author may not be used to endorse or promote products
23  * derived from this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35  */
36 
37 /*
38  * Serial Communication Interface (SCI)
39  */
40 
41 #if 0
42 !defined(SH4)
43 
44 /* SH3 definitions */
45 
46 #define SHREG_SCSMR (*(volatile unsigned char *) 0xFFFFFE80)
47 #define SHREG_SCBRR (*(volatile unsigned char *) 0xFFFFFE82)
48 #define SHREG_SCSCR (*(volatile unsigned char *) 0xFFFFFE84)
49 #define SHREG_SCTDR (*(volatile unsigned char *) 0xFFFFFE86)
50 #define SHREG_SCSSR (*(volatile unsigned char *) 0xFFFFFE88)
51 #define SHREG_SCRDR (*(volatile unsigned char *) 0xFFFFFE8A)
52 #define SHREG_SCSPDR (*(volatile unsigned char *) 0xf4000136)
53 
54 #else
55 
56 /* SH4 definitions */
57 
58 #define SHREG_SCSMR /* (*(volatile unsigned char *) */ 0xffe00000
59 #define SHREG_SCBRR /* (*(volatile unsigned char *) */ 0xffe00004
60 #define SHREG_SCSCR /* (*(volatile unsigned char *) */ 0xffe00008
61 #define SHREG_SCTDR /* (*(volatile unsigned char *) */ 0xffe0000c
62 #define SHREG_SCSSR /* (*(volatile unsigned char *) */ 0xffe00010
63 #define SHREG_SCRDR /* (*(volatile unsigned char *) */ 0xffe00014
64 #define SHREG_SCSPTR /* (*(volatile unsigned char *) */ 0xffe0001c
65 
66 #endif
67 
68 #define SCSCR_TIE 0x80 /* Transmit Interrupt Enable */
69 #define SCSCR_RIE 0x40 /* Receive Interrupt Enable */
70 #define SCSCR_TE 0x20 /* Transmit Enable */
71 #define SCSCR_RE 0x10 /* Receive Enable */
72 #define SCSCR_MPIE 0x08 /* Multi Processor Interrupt Enable */
73 #define SCSCR_TEIE 0x04 /* Transmit End Interrupt Enable */
74 #define SCSCR_CKE1 0x02 /* ClocK Enable 1 */
75 #define SCSCR_CKE0 0x01 /* ClocK Enable 0 */
76 
77 #define SCSSR_TDRE 0x80
78 #define SCSSR_RDRF 0x40
79 #define SCSSR_ORER 0x20
80 #define SCSSR_FER 0x10
81 #define SCSSR_PER 0x08
82 
83 #define SCSPTR_SPB1IO 0x08
84 #define SCSPTR_SPB1DT 0x04
85 #define SCSPTR_SPB0IO 0x02
86 #define SCSPTR_SPB0DT 0x01
87 
88 #if defined(SH3)
89 #define SCSPDR_SCP0DT 0x01
90 #endif
91 
92 
93 #endif /* SH4_SCIREG_H */

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