machine_evbmips.cc Source File

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machine_evbmips.cc
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1 /*
2  * Copyright (C) 2005-2009 Anders Gavare. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * 1. Redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution.
12  * 3. The name of the author may not be used to endorse or promote products
13  * derived from this software without specific prior written permission.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  *
28  * COMMENT: MIPS evaluation boards (e.g. Malta)
29  */
30 
31 #include <stdio.h>
32 #include <stdlib.h>
33 #include <string.h>
34 
35 #include "bus_isa.h"
36 #include "bus_pci.h"
37 #include "cpu.h"
38 #include "device.h"
39 #include "devices.h"
40 #include "machine.h"
41 #include "memory.h"
42 #include "misc.h"
43 
44 #include "thirdparty/maltareg.h"
45 
46 
47 MACHINE_SETUP(evbmips)
48 {
49  char tmpstr[1000], tmpstr2[1000];
50  struct pci_data *pci_data;
51  int i;
52 
53  /* See http://www.netbsd.org/ports/evbmips/ for more info. */
54 
55  switch (machine->machine_subtype) {
56 
59  if (machine->emulated_hz == 0)
60  machine->emulated_hz = 33000000;
62  machine->machine_name = strdup("MALTA (evbmips, little endian)");
63 
65  machine->machine_name = strdup("MALTA (evbmips, big endian)");
67  }
68 
69  /* ISA bus at MIPS irq 2: */
70  snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].2",
72  bus_isa_init(machine, tmpstr, 0, 0x18000000, 0x10000000);
73 
74  snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=%s.cpu[%i].4 "
75  "addr=0x%x name2=tty2 in_use=0", machine->path,
77  device_add(machine, tmpstr);
78 
79  /* Add a GT controller; timer interrupts at ISA irq 9: */
80  snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].2.isa.9",
82  snprintf(tmpstr2, sizeof(tmpstr2), "%s.cpu[%i].2",
84  pci_data = dev_gt_init(machine, machine->memory, 0x1be00000,
85  tmpstr, tmpstr2, 120);
86 
87  if (machine->x11_md.in_use) {
89  fatal("WARNING: remember to use -o 'console="
90  "tty0' if you are emulating Linux. (Not"
91  " needed for NetBSD.)\n");
92  }
93  bus_pci_add(machine, pci_data, machine->memory,
94  0, 8, 0, "s3_virge");
95  }
96 
97  bus_pci_add(machine, pci_data, machine->memory,
98  0, 9, 0, "piix4_isa");
99  bus_pci_add(machine, pci_data, machine->memory,
100  0, 9, 1, "piix4_ide");
101 
102  /* pcn: Not yet, since it is just a bogus device, so far. */
103  /* bus_pci_add(machine, pci_data, machine->memory,
104  0, 11, 0, "pcn"); */
105 
106  device_add(machine, "malta_lcd addr=0x1f000400");
107  break;
108 
109  default:fatal("Unimplemented EVBMIPS model.\n");
110  exit(1);
111  }
112 
113  if (!machine->prom_emulation)
114  return;
115 
116 
117  /* NetBSD/evbmips wants these: (at least for Malta) */
118 
119  /* a0 = argc */
120  cpu->cd.mips.gpr[MIPS_GPR_A0] = 2;
121 
122  /* a1 = argv */
123  cpu->cd.mips.gpr[MIPS_GPR_A1] = (int32_t)0x9fc01000;
124  store_32bit_word(cpu, (int32_t)0x9fc01000, 0x9fc01040);
125  store_32bit_word(cpu, (int32_t)0x9fc01004, 0x9fc01200);
126  store_32bit_word(cpu, (int32_t)0x9fc01008, 0);
127 
130  store_string(cpu, (int32_t)0x9fc01040, machine->bootstr);
131  store_string(cpu, (int32_t)0x9fc01200, machine->bootarg);
132 
133  /* a2 = (yamon_env_var *)envp */
134  cpu->cd.mips.gpr[MIPS_GPR_A2] = (int32_t)0x9fc01800;
135 
137 
138  /* a3 = memsize */
140  /* Hm. Linux ignores a3. */
141 
142  /* Set the Core ID. See maltareg.h for more info. */
143  store_32bit_word(cpu, (int32_t)(0x80000000 + MALTA_REVISION),
144  (1 << 10) + 0x26);
145 
146  /* Call vectors at 0x9fc005xx: */
147  for (i=0; i<0x100; i+=4)
148  store_32bit_word(cpu, (int64_t)(int32_t)0x9fc00500 + i,
149  (int64_t)(int32_t)0x9fc00800 + i);
150 
151  /* "Magic trap" PROM instructions at 0x9fc008xx: */
152  for (i=0; i<0x100; i+=4)
153  store_32bit_word(cpu, (int64_t)(int32_t)0x9fc00800 + i,
154  0x00c0de0c);
155 }
156 
157 
159 {
160  switch (machine->machine_subtype) {
161 
164  /* 5Kc = MIPS64 rev 1, 5KE = MIPS64 rev 2 */
165  machine->cpu_name = strdup("5Kc");
166  break;
167 
168  default:fatal("Unimplemented evbmips subtype.\n");
169  exit(1);
170  }
171 }
172 
173 
175 {
177 }
178 
179 
181 {
182  MR_DEFAULT(evbmips, "MIPS evaluation boards (evbmips)",
184 
185  machine_entry_add_alias(me, "evbmips");
186 
188  "malta", NULL);
189 
190  machine_entry_add_subtype(me, "Malta (Big-Endian)",
191  MACHINE_EVBMIPS_MALTA_BE, "maltabe", NULL);
192 
193  me->set_default_ram = machine_default_ram_evbmips;
194 }
195 
void fatal(const char *fmt,...)
Definition: main.cc:152
int emulated_hz
Definition: machine.h:165
int prom_emulation
Definition: machine.h:149
char * cpu_name
Definition: machine.h:133
int store_32bit_word(struct cpu *cpu, uint64_t addr, uint64_t data32)
Definition: memory.cc:783
#define MIPS_GPR_A0
union cpu::@1 cd
void store_string(struct cpu *cpu, uint64_t addr, const char *s)
Definition: memory.cc:695
struct memory * memory
Definition: machine.h:126
void bus_pci_add(struct machine *machine, struct pci_data *pci_data, struct memory *mem, int bus, int device, int function, const char *name)
Definition: bus_pci.cc:217
#define MALTA_CBUSUART
Definition: maltareg.h:173
#define MIPS_GPR_A2
#define MALTA_REVISION
Definition: maltareg.h:198
void * device_add(struct machine *machine, const char *name_and_params)
Definition: device.cc:252
#define MACHINE_EVBMIPS_MALTA_BE
Definition: machine.h:311
int physical_ram_in_mb
Definition: machine.h:147
#define EMUL_LITTLE_ENDIAN
Definition: misc.h:164
char * boot_string_argument
Definition: machine.h:171
char * boot_kernel_filename
Definition: machine.h:170
char * path
Definition: machine.h:108
int bootstrap_cpu
Definition: machine.h:136
#define MIPS_GPR_A3
struct pci_data * dev_gt_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, const char *timer_irq_path, const char *isa_irq_path, int type)
Definition: dev_gt.cc:225
#define MIPS_GPR_A1
void machine_entry_add_subtype(struct machine_entry *me, const char *name, int oldstyle_subtype,...)
Definition: machine.cc:717
MACHINE_REGISTER(evbmips)
void yamon_machine_setup(struct machine *machine, uint64_t env)
Definition: yamon.cc:52
void machine_entry_add_alias(struct machine_entry *me, const char *name)
Definition: machine.cc:697
struct x11_md x11_md
Definition: machine.h:179
MACHINE_DEFAULT_RAM(evbmips)
char * bootstr
Definition: machine.h:155
Definition: cpu.h:326
#define MACHINE_EVBMIPS
Definition: machine.h:219
void COMBINE() strlen(struct cpu *cpu, struct arm_instr_call *ic, int low_addr)
struct bus_isa_data * bus_isa_init(struct machine *machine, char *interrupt_base_path, uint32_t bus_isa_flags, uint64_t isa_portbase, uint64_t isa_membase)
Definition: bus_isa.cc:174
MACHINE_SETUP(evbmips)
int in_use
Definition: machine.h:82
uint8_t byte_order
Definition: cpu.h:347
uint64_t gpr[N_MIPS_GPRS]
Definition: cpu_mips.h:209
struct mips_cpu mips
Definition: cpu.h:443
int machine_subtype
Definition: machine.h:112
MACHINE_DEFAULT_CPU(evbmips)
#define MR_DEFAULT(x, name, arch, type)
Definition: machine.h:370
const char * machine_name
Definition: machine.h:115
#define ARCH_MIPS
Definition: machine.h:203
#define MACHINE_EVBMIPS_MALTA
Definition: machine.h:310
#define EMUL_BIG_ENDIAN
Definition: misc.h:165
char * bootarg
Definition: machine.h:156

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