dev_ps2_spd.cc Source File

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dev_ps2_spd.cc
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1 /*
2  * Copyright (C) 2004-2009 Anders Gavare. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * 1. Redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution.
12  * 3. The name of the author may not be used to endorse or promote products
13  * derived from this software without specific prior written permission.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  *
28  * COMMENT: PlayStation 2 SPD harddisk controller
29  *
30  * TODO
31  */
32 
33 #include <stdio.h>
34 #include <stdlib.h>
35 #include <string.h>
36 
37 #include "cpu.h"
38 #include "device.h"
39 #include "machine.h"
40 #include "memory.h"
41 #include "misc.h"
42 
43 
44 #define DEV_PS2_SPD_LENGTH 0x800
45 
46 
47 struct ps2_spd_data {
48  uint64_t wdcaddr;
49 };
50 
51 
52 DEVICE_ACCESS(ps2_spd)
53 {
54  struct ps2_spd_data *d = (struct ps2_spd_data *) extra;
55  uint64_t idata = 0, odata = 0;
56 
57  if (writeflag == MEM_WRITE)
58  idata = memory_readmax64(cpu, data, len);
59 
60  switch (relative_addr) {
61  case 0x40:
62  case 0x42:
63  case 0x44:
64  case 0x46:
65  case 0x48:
66  case 0x4a:
67  case 0x4c:
68  case 0x4e:
69  debug("[ ps2_spd: wdc access ]\n");
70  cpu->memory_rw(cpu, mem, (relative_addr - 0x40) / 2 +
71  d->wdcaddr, data, len, writeflag, PHYSICAL);
72  return 1;
73  case 0x5c: /* aux control */
74  debug("[ ps2_spd: wdc access (2) ]\n");
75  cpu->memory_rw(cpu, mem, d->wdcaddr + 0x206, data, len,
76  writeflag, PHYSICAL);
77  return 1;
78  default:
79  if (writeflag==MEM_READ) {
80  debug("[ ps2_spd: read from addr 0x%x: 0x%llx ]\n",
81  (int)relative_addr, (long long)odata);
82  } else {
83  debug("[ ps2_spd: write to addr 0x%x: 0x%llx ]\n",
84  (int)relative_addr, (long long)idata);
85  }
86  }
87 
88  if (writeflag == MEM_READ)
89  memory_writemax64(cpu, data, len, odata);
90 
91  return 1;
92 }
93 
94 
95 DEVINIT(ps2_spd)
96 {
97  struct ps2_spd_data *d;
98  char tmpstr[200];
99 
100  CHECK_ALLOCATION(d = (struct ps2_spd_data *) malloc(sizeof(struct ps2_spd_data)));
101  memset(d, 0, sizeof(struct ps2_spd_data));
102 
104 
107  dev_ps2_spd_access, d, DM_DEFAULT, NULL);
108 
109  /* Register a generic wdc device at a bogus address: */
110  /* IRQ = PS2 SBUS irq 0 */
111  snprintf(tmpstr, sizeof(tmpstr), "wdc addr=0x%llx irq=%s.ps2_sbus.0",
112  (long long)d->wdcaddr, devinit->interrupt_path);
113  device_add(devinit->machine, tmpstr);
114 
115  return 1;
116 }
117 
uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
Definition: memory.cc:55
#define DM_DEFAULT
Definition: memory.h:130
DEVINIT(ps2_spd)
Definition: dev_ps2_spd.cc:95
#define MEM_READ
Definition: memory.h:116
struct memory * memory
Definition: machine.h:126
void * device_add(struct machine *machine, const char *name_and_params)
Definition: device.cc:252
#define CHECK_ALLOCATION(ptr)
Definition: misc.h:239
#define PHYSICAL
Definition: memory.h:126
int(* memory_rw)(struct cpu *cpu, struct memory *mem, uint64_t vaddr, unsigned char *data, size_t len, int writeflag, int cache_flags)
Definition: cpu.h:365
DEVICE_ACCESS(ps2_spd)
Definition: dev_ps2_spd.cc:52
u_short data
Definition: siireg.h:79
#define MEM_WRITE
Definition: memory.h:117
Definition: device.h:40
#define debug
Definition: dev_adb.cc:57
Definition: cpu.h:326
struct machine * machine
Definition: device.h:41
#define DEV_PS2_SPD_LENGTH
Definition: dev_ps2_spd.cc:44
void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len, uint64_t data)
Definition: memory.cc:89
void memory_device_register(struct memory *mem, const char *, uint64_t baseaddr, uint64_t len, int(*f)(struct cpu *, struct memory *, uint64_t, unsigned char *, size_t, int, void *), void *extra, int flags, unsigned char *dyntrans_data)
Definition: memory.cc:339
uint64_t addr
Definition: device.h:46
uint64_t wdcaddr
Definition: dev_ps2_spd.cc:48
char * interrupt_path
Definition: device.h:50

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