dev_sgi_ip19.cc Source File

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dev_sgi_ip19.cc
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1 /*
2  * Copyright (C) 2004-2009 Anders Gavare. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * 1. Redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution.
12  * 3. The name of the author may not be used to endorse or promote products
13  * derived from this software without specific prior written permission.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  *
28  * COMMENT: SGI IP19 (and IP25) stuff
29  *
30  * NOTE/TODO: The stuff in here is mostly guesswork.
31  */
32 
33 #include <stdio.h>
34 #include <stdlib.h>
35 #include <string.h>
36 
37 #include "cpu.h"
38 #include "device.h"
39 #include "machine.h"
40 #include "memory.h"
41 #include "misc.h"
42 
43 
44 #define DEV_SGI_IP19_LENGTH 0x100000
45 
46 struct sgi_ip19_data {
47  uint64_t cycle_counter;
48 };
49 
50 
51 DEVICE_ACCESS(sgi_ip19)
52 {
53  struct sgi_ip19_data *d = (struct sgi_ip19_data *) extra;
54  uint64_t idata = 0, odata = 0;
55  int regnr;
56 
57  if (writeflag == MEM_WRITE)
58  idata = memory_readmax64(cpu, data, len);
59 
60  regnr = relative_addr / sizeof(uint32_t);
61 
62  switch (relative_addr) {
63 
64  case 0x08: /* cpu id */
65  if (writeflag == MEM_WRITE) {
66  debug("[ sgi_ip19: unimplemented write to address "
67  "0x%x (cpu id), data=0x%08x ]\n", (int)
68  relative_addr, (int)idata);
69  } else {
70  odata = cpu->cpu_id; /* ? TODO */
71  }
72  break;
73 
74  case 0x200: /* cpu available mask? */
75  if (writeflag == MEM_WRITE) {
76  debug("[ sgi_ip19: unimplemented write to address "
77  "0x%x (cpu available mask), data=0x%08x ]\n",
78  (int)relative_addr, (int)idata);
79  } else {
80  /* Max 16 cpus? */
81  odata = ((1 << cpu->machine->ncpus) - 1) << 16;
82  }
83  break;
84 
85  case 0x20000: /* cycle counter or clock */
86  if (writeflag == MEM_WRITE) {
87  debug("[ sgi_ip19: unimplemented write to address "
88  "0x%x (cycle counter), data=0x%08x ]\n",
89  (int)relative_addr, (int)idata);
90  } else {
91  d->cycle_counter += 100;
92  odata = d->cycle_counter;
93  }
94 
95  break;
96 
97  default:
98  if (writeflag == MEM_WRITE) {
99  debug("[ sgi_ip19: unimplemented write to address "
100  "0x%x, data=0x%08x ]\n", (int)relative_addr,
101  (int)idata);
102  } else {
103  debug("[ sgi_ip19: unimplemented read from address "
104  "0x%x: 0x%08x ]\n", (int)relative_addr, (int)odata);
105  }
106  }
107 
108  if (writeflag == MEM_READ)
109  memory_writemax64(cpu, data, len, odata);
110 
111  return 1;
112 }
113 
114 
115 DEVINIT(sgi_ip19)
116 {
117  struct sgi_ip19_data *d;
118 
119  CHECK_ALLOCATION(d = (struct sgi_ip19_data *) malloc(sizeof(struct sgi_ip19_data)));
120  memset(d, 0, sizeof(struct sgi_ip19_data));
121 
124  dev_sgi_ip19_access, (void *)d, DM_DEFAULT, NULL);
125 
126  return 1;
127 }
128 
uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
Definition: memory.cc:55
#define DM_DEFAULT
Definition: memory.h:130
char * name
Definition: device.h:43
struct machine * machine
Definition: cpu.h:328
#define MEM_READ
Definition: memory.h:116
DEVINIT(sgi_ip19)
struct memory * memory
Definition: machine.h:126
uint64_t cycle_counter
Definition: dev_sgi_ip19.cc:47
DEVICE_ACCESS(sgi_ip19)
Definition: dev_sgi_ip19.cc:51
int ncpus
Definition: machine.h:139
#define CHECK_ALLOCATION(ptr)
Definition: misc.h:239
u_short data
Definition: siireg.h:79
#define MEM_WRITE
Definition: memory.h:117
Definition: device.h:40
#define DEV_SGI_IP19_LENGTH
Definition: dev_sgi_ip19.cc:44
#define debug
Definition: dev_adb.cc:57
int cpu_id
Definition: cpu.h:359
Definition: cpu.h:326
struct machine * machine
Definition: device.h:41
void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len, uint64_t data)
Definition: memory.cc:89
void memory_device_register(struct memory *mem, const char *, uint64_t baseaddr, uint64_t len, int(*f)(struct cpu *, struct memory *, uint64_t, unsigned char *, size_t, int, void *), void *extra, int flags, unsigned char *dyntrans_data)
Definition: memory.cc:339
uint64_t addr
Definition: device.h:46

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