wdcreg.h File Reference

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wdcreg.h File Reference

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Macros

#define wd_data   0 /* data register (R/W - 16 bits) */
 
#define wd_error   1 /* error register (R) */
 
#define wd_precomp   1 /* write precompensation (W) */
 
#define wd_features   1 /* features (W), same as wd_precomp */
 
#define wd_seccnt   2 /* sector count (R/W) */
 
#define wd_ireason   2 /* interrupt reason (R/W) (for atapi) */
 
#define wd_sector   3 /* first sector number (R/W) */
 
#define wd_cyl_lo   4 /* cylinder address, low byte (R/W) */
 
#define wd_cyl_hi   5 /* cylinder address, high byte (R/W) */
 
#define wd_sdh   6 /* sector size/drive/head (R/W) */
 
#define wd_command   7 /* command register (W) */
 
#define wd_status   7 /* immediate status (R) */
 
#define wd_lba_lo   3 /* lba address, low byte (RW) */
 
#define wd_lba_mi   4 /* lba address, middle byte (RW) */
 
#define wd_lba_hi   5 /* lba address, high byte (RW) */
 
#define wd_aux_altsts   0 /* alternate fixed disk status (R) */
 
#define wd_aux_ctlr   0 /* fixed disk controller control (W) */
 
#define WDCTL_4BIT   0x08 /* use four head bits (wd1003) */
 
#define WDCTL_RST   0x04 /* reset the controller */
 
#define WDCTL_IDS   0x02 /* disable controller interrupts */
 
#define WDCS_BSY   0x80 /* busy */
 
#define WDCS_DRDY   0x40 /* drive ready */
 
#define WDCS_DWF   0x20 /* drive write fault */
 
#define WDCS_DSC   0x10 /* drive seek complete */
 
#define WDCS_DRQ   0x08 /* data request */
 
#define WDCS_CORR   0x04 /* corrected data */
 
#define WDCS_IDX   0x02 /* index */
 
#define WDCS_ERR   0x01 /* error */
 
#define WDCS_BITS   "\020\010bsy\007drdy\006dwf\005dsc\004drq\003corr\002idx\001err"
 
#define WDCE_BBK   0x80 /* bad block detected */
 
#define WDCE_CRC   0x80 /* CRC error (Ultra-DMA only) */
 
#define WDCE_UNC   0x40 /* uncorrectable data error */
 
#define WDCE_MC   0x20 /* media changed */
 
#define WDCE_IDNF   0x10 /* id not found */
 
#define WDCE_MCR   0x08 /* media change requested */
 
#define WDCE_ABRT   0x04 /* aborted command */
 
#define WDCE_TK0NF   0x02 /* track 0 not found */
 
#define WDCE_AMNF   0x01 /* address mark not found */
 
#define WDCC_NOP   0x00 /* Always fail with "aborted command" */
 
#define WDCC_RECAL   0x10 /* disk restore code -- resets cntlr */
 
#define WDCC_READ   0x20 /* disk read code */
 
#define WDCC_WRITE   0x30 /* disk write code */
 
#define WDCC__LONG   0x02 /* modifier -- access ecc bytes */
 
#define WDCC__NORETRY   0x01 /* modifier -- no retrys */
 
#define WDCC_FORMAT   0x50 /* disk format code */
 
#define WDCC_DIAGNOSE   0x90 /* controller diagnostic */
 
#define WDCC_IDP   0x91 /* initialize drive parameters */
 
#define WDCC_SMART   0xb0 /* Self Mon, Analysis, Reporting Tech */
 
#define WDCC_READMULTI   0xc4 /* read multiple */
 
#define WDCC_WRITEMULTI   0xc5 /* write multiple */
 
#define WDCC_SETMULTI   0xc6 /* set multiple mode */
 
#define WDCC_READDMA   0xc8 /* read with DMA */
 
#define WDCC_WRITEDMA   0xca /* write with DMA */
 
#define WDCC_ACKMC   0xdb /* acknowledge media change */
 
#define WDCC_LOCK   0xde /* lock drawer */
 
#define WDCC_UNLOCK   0xdf /* unlock drawer */
 
#define WDCC_FLUSHCACHE   0xe7 /* Flush cache */
 
#define WDCC_IDENTIFY   0xec /* read parameters from controller */
 
#define SET_FEATURES   0xef /* set features */
 
#define WDCC_IDLE   0xe3 /* set idle timer & enter idle mode */
 
#define WDCC_IDLE_IMMED   0xe1 /* enter idle mode */
 
#define WDCC_SLEEP   0xe6 /* enter sleep mode */
 
#define WDCC_STANDBY   0xe2 /* set standby timer & enter standby */
 
#define WDCC_STANDBY_IMMED   0xe0 /* enter standby mode */
 
#define WDCC_CHECK_PWR   0xe5 /* check power mode */
 
#define WDCC_SEC_SET_PASSWORD   0xf1 /* set user or master password */
 
#define WDCC_SEC_UNLOCK   0xf2 /* authenticate */
 
#define WDCC_SEC_ERASE_PREPARE   0xf3 /* enable device erasing */
 
#define WDCC_SEC_ERASE_UNIT   0xf4 /* erase all user data */
 
#define WDCC_SEC_FREEZE_LOCK   0xf5 /* prevent password changes */
 
#define WDCC_SEC_DISABLE_PASSWORD   0xf6 /* disable lock mode */
 
#define WDCC_READ_EXT   0x24 /* read 48-bit addressing */
 
#define WDCC_WRITE_EXT   0x34 /* write 48-bit addressing */
 
#define WDCC_READMULTI_EXT   0x29 /* read multiple 48-bit addressing */
 
#define WDCC_WRITEMULTI_EXT   0x39 /* write multiple 48-bit addressing */
 
#define WDCC_READDMA_EXT   0x25 /* read 48-bit addressing with DMA */
 
#define WDCC_WRITEDMA_EXT   0x35 /* write 48-bit addressing with DMA */
 
#define WDSF_EN_WR_CACHE   0x02
 
#define WDSF_SET_MODE   0x03
 
#define WDSF_REASSIGN_EN   0x04
 
#define WDSF_RETRY_DS   0x33
 
#define WDSF_SET_CACHE_SGMT   0x54
 
#define WDSF_READAHEAD_DS   0x55
 
#define WDSF_POD_DS   0x66
 
#define WDSF_ECC_DS   0x77
 
#define WDSF_WRITE_CACHE_DS   0x82
 
#define WDSF_REASSIGN_DS   0x84
 
#define WDSF_ECC_EN   0x88
 
#define WDSF_RETRY_EN   0x99
 
#define WDSF_SET_CURRENT   0x9a
 
#define WDSF_READAHEAD_EN   0xaa
 
#define WDSF_PREFETCH_SET   0xab
 
#define WDSF_POD_EN   0xcc
 
#define WDSM_RD_DATA   0xd0
 
#define WDSM_ATTR_AUTOSAVE_EN   0xd2
 
#define WDSM_SAVE_ATTR   0xd3
 
#define WDSM_EXEC_OFFL_IMM   0xd4
 
#define WDSM_ENABLE_OPS   0xd8
 
#define WDSM_DISABLE_OPS   0xd9
 
#define WDSM_STATUS   0xda
 
#define WDSMART_CYL_LO   0x4f
 
#define WDSMART_CYL_HI   0xc2
 
#define WDSD_IBM   0xa0 /* forced to 512 byte sector, ecc */
 
#define WDSD_CHS   0x00 /* cylinder/head/sector addressing */
 
#define WDSD_LBA   0x40 /* logical block addressing */
 
#define ATAPI_CHECK_POWER_MODE   0xe5
 
#define ATAPI_EXEC_DRIVE_DIAGS   0x90
 
#define ATAPI_IDLE_IMMEDIATE   0xe1
 
#define ATAPI_NOP   0x00
 
#define ATAPI_PKT_CMD   0xa0
 
#define ATAPI_IDENTIFY_DEVICE   0xa1
 
#define ATAPI_SOFT_RESET   0x08
 
#define ATAPI_SLEEP   0xe6
 
#define ATAPI_STANDBY_IMMEDIATE   0xe0
 
#define ATAPI_PKT_CMD_FTRE_DMA   0x01
 
#define ATAPI_PKT_CMD_FTRE_OVL   0x02
 
#define WDCI_CMD   0x01 /* command(1) or data(0) */
 
#define WDCI_IN   0x02 /* transfer to(1) or from(0) the host */
 
#define WDCI_RELEASE   0x04 /* bus released until completion */
 
#define PHASE_CMDOUT   (WDCS_DRQ | WDCI_CMD)
 
#define PHASE_DATAIN   (WDCS_DRQ | WDCI_IN)
 
#define PHASE_DATAOUT   (WDCS_DRQ)
 
#define PHASE_COMPLETED   (WDCI_IN | WDCI_CMD)
 
#define PHASE_ABORTED   (0)
 

Macro Definition Documentation

◆ ATAPI_CHECK_POWER_MODE

#define ATAPI_CHECK_POWER_MODE   0xe5

Definition at line 198 of file wdcreg.h.

◆ ATAPI_EXEC_DRIVE_DIAGS

#define ATAPI_EXEC_DRIVE_DIAGS   0x90

Definition at line 199 of file wdcreg.h.

◆ ATAPI_IDENTIFY_DEVICE

#define ATAPI_IDENTIFY_DEVICE   0xa1

Definition at line 203 of file wdcreg.h.

Referenced by wdc_command().

◆ ATAPI_IDLE_IMMEDIATE

#define ATAPI_IDLE_IMMEDIATE   0xe1

Definition at line 200 of file wdcreg.h.

◆ ATAPI_NOP

#define ATAPI_NOP   0x00

Definition at line 201 of file wdcreg.h.

◆ ATAPI_PKT_CMD

#define ATAPI_PKT_CMD   0xa0

Definition at line 202 of file wdcreg.h.

◆ ATAPI_PKT_CMD_FTRE_DMA

#define ATAPI_PKT_CMD_FTRE_DMA   0x01

Definition at line 209 of file wdcreg.h.

◆ ATAPI_PKT_CMD_FTRE_OVL

#define ATAPI_PKT_CMD_FTRE_OVL   0x02

Definition at line 210 of file wdcreg.h.

◆ ATAPI_SLEEP

#define ATAPI_SLEEP   0xe6

Definition at line 205 of file wdcreg.h.

◆ ATAPI_SOFT_RESET

#define ATAPI_SOFT_RESET   0x08

Definition at line 204 of file wdcreg.h.

◆ ATAPI_STANDBY_IMMEDIATE

#define ATAPI_STANDBY_IMMEDIATE   0xe0

Definition at line 206 of file wdcreg.h.

◆ PHASE_ABORTED

#define PHASE_ABORTED   (0)

Definition at line 221 of file wdcreg.h.

◆ PHASE_CMDOUT

#define PHASE_CMDOUT   (WDCS_DRQ | WDCI_CMD)

Definition at line 217 of file wdcreg.h.

◆ PHASE_COMPLETED

#define PHASE_COMPLETED   (WDCI_IN | WDCI_CMD)

Definition at line 220 of file wdcreg.h.

◆ PHASE_DATAIN

#define PHASE_DATAIN   (WDCS_DRQ | WDCI_IN)

Definition at line 218 of file wdcreg.h.

◆ PHASE_DATAOUT

#define PHASE_DATAOUT   (WDCS_DRQ)

Definition at line 219 of file wdcreg.h.

◆ SET_FEATURES

#define SET_FEATURES   0xef /* set features */

Definition at line 132 of file wdcreg.h.

Referenced by wdc_command().

◆ wd_aux_altsts

#define wd_aux_altsts   0 /* alternate fixed disk status (R) */

Definition at line 66 of file wdcreg.h.

◆ wd_aux_ctlr

#define wd_aux_ctlr   0 /* fixed disk controller control (W) */

Definition at line 67 of file wdcreg.h.

◆ wd_command

#define wd_command   7 /* command register (W) */

Definition at line 59 of file wdcreg.h.

◆ wd_cyl_hi

#define wd_cyl_hi   5 /* cylinder address, high byte (R/W) */

Definition at line 57 of file wdcreg.h.

◆ wd_cyl_lo

#define wd_cyl_lo   4 /* cylinder address, low byte (R/W) */

Definition at line 56 of file wdcreg.h.

◆ wd_data

#define wd_data   0 /* data register (R/W - 16 bits) */

Definition at line 49 of file wdcreg.h.

Referenced by DEVICE_ACCESS().

◆ wd_error

#define wd_error   1 /* error register (R) */

Definition at line 50 of file wdcreg.h.

◆ wd_features

#define wd_features   1 /* features (W), same as wd_precomp */

Definition at line 52 of file wdcreg.h.

◆ wd_ireason

#define wd_ireason   2 /* interrupt reason (R/W) (for atapi) */

Definition at line 54 of file wdcreg.h.

◆ wd_lba_hi

#define wd_lba_hi   5 /* lba address, high byte (RW) */

Definition at line 63 of file wdcreg.h.

◆ wd_lba_lo

#define wd_lba_lo   3 /* lba address, low byte (RW) */

Definition at line 61 of file wdcreg.h.

◆ wd_lba_mi

#define wd_lba_mi   4 /* lba address, middle byte (RW) */

Definition at line 62 of file wdcreg.h.

◆ wd_precomp

#define wd_precomp   1 /* write precompensation (W) */

Definition at line 51 of file wdcreg.h.

◆ wd_sdh

#define wd_sdh   6 /* sector size/drive/head (R/W) */

Definition at line 58 of file wdcreg.h.

◆ wd_seccnt

#define wd_seccnt   2 /* sector count (R/W) */

Definition at line 53 of file wdcreg.h.

◆ wd_sector

#define wd_sector   3 /* first sector number (R/W) */

Definition at line 55 of file wdcreg.h.

◆ wd_status

#define wd_status   7 /* immediate status (R) */

Definition at line 60 of file wdcreg.h.

◆ WDCC__LONG

#define WDCC__LONG   0x02 /* modifier -- access ecc bytes */

Definition at line 110 of file wdcreg.h.

◆ WDCC__NORETRY

#define WDCC__NORETRY   0x01 /* modifier -- no retrys */

Definition at line 111 of file wdcreg.h.

◆ WDCC_ACKMC

#define WDCC_ACKMC   0xdb /* acknowledge media change */

Definition at line 126 of file wdcreg.h.

◆ WDCC_CHECK_PWR

#define WDCC_CHECK_PWR   0xe5 /* check power mode */

Definition at line 139 of file wdcreg.h.

◆ WDCC_DIAGNOSE

#define WDCC_DIAGNOSE   0x90 /* controller diagnostic */

Definition at line 114 of file wdcreg.h.

◆ WDCC_FLUSHCACHE

#define WDCC_FLUSHCACHE   0xe7 /* Flush cache */

Definition at line 130 of file wdcreg.h.

◆ WDCC_FORMAT

#define WDCC_FORMAT   0x50 /* disk format code */

Definition at line 113 of file wdcreg.h.

◆ WDCC_IDENTIFY

#define WDCC_IDENTIFY   0xec /* read parameters from controller */

Definition at line 131 of file wdcreg.h.

Referenced by wdc_command().

◆ WDCC_IDLE

#define WDCC_IDLE   0xe3 /* set idle timer & enter idle mode */

Definition at line 134 of file wdcreg.h.

◆ WDCC_IDLE_IMMED

#define WDCC_IDLE_IMMED   0xe1 /* enter idle mode */

Definition at line 135 of file wdcreg.h.

◆ WDCC_IDP

#define WDCC_IDP   0x91 /* initialize drive parameters */

Definition at line 115 of file wdcreg.h.

Referenced by wdc_command().

◆ WDCC_LOCK

#define WDCC_LOCK   0xde /* lock drawer */

Definition at line 127 of file wdcreg.h.

◆ WDCC_NOP

#define WDCC_NOP   0x00 /* Always fail with "aborted command" */

Definition at line 105 of file wdcreg.h.

◆ WDCC_READ

#define WDCC_READ   0x20 /* disk read code */

Definition at line 108 of file wdcreg.h.

Referenced by wdc_command().

◆ WDCC_READ_EXT

#define WDCC_READ_EXT   0x24 /* read 48-bit addressing */

Definition at line 152 of file wdcreg.h.

◆ WDCC_READDMA

#define WDCC_READDMA   0xc8 /* read with DMA */

Definition at line 123 of file wdcreg.h.

◆ WDCC_READDMA_EXT

#define WDCC_READDMA_EXT   0x25 /* read 48-bit addressing with DMA */

Definition at line 158 of file wdcreg.h.

◆ WDCC_READMULTI

#define WDCC_READMULTI   0xc4 /* read multiple */

Definition at line 119 of file wdcreg.h.

Referenced by wdc_command().

◆ WDCC_READMULTI_EXT

#define WDCC_READMULTI_EXT   0x29 /* read multiple 48-bit addressing */

Definition at line 155 of file wdcreg.h.

◆ WDCC_RECAL

#define WDCC_RECAL   0x10 /* disk restore code -- resets cntlr */

Definition at line 106 of file wdcreg.h.

Referenced by wdc_command().

◆ WDCC_SEC_DISABLE_PASSWORD

#define WDCC_SEC_DISABLE_PASSWORD   0xf6 /* disable lock mode */

Definition at line 146 of file wdcreg.h.

◆ WDCC_SEC_ERASE_PREPARE

#define WDCC_SEC_ERASE_PREPARE   0xf3 /* enable device erasing */

Definition at line 143 of file wdcreg.h.

◆ WDCC_SEC_ERASE_UNIT

#define WDCC_SEC_ERASE_UNIT   0xf4 /* erase all user data */

Definition at line 144 of file wdcreg.h.

◆ WDCC_SEC_FREEZE_LOCK

#define WDCC_SEC_FREEZE_LOCK   0xf5 /* prevent password changes */

Definition at line 145 of file wdcreg.h.

◆ WDCC_SEC_SET_PASSWORD

#define WDCC_SEC_SET_PASSWORD   0xf1 /* set user or master password */

Definition at line 141 of file wdcreg.h.

◆ WDCC_SEC_UNLOCK

#define WDCC_SEC_UNLOCK   0xf2 /* authenticate */

Definition at line 142 of file wdcreg.h.

◆ WDCC_SETMULTI

#define WDCC_SETMULTI   0xc6 /* set multiple mode */

Definition at line 121 of file wdcreg.h.

◆ WDCC_SLEEP

#define WDCC_SLEEP   0xe6 /* enter sleep mode */

Definition at line 136 of file wdcreg.h.

◆ WDCC_SMART

#define WDCC_SMART   0xb0 /* Self Mon, Analysis, Reporting Tech */

Definition at line 117 of file wdcreg.h.

◆ WDCC_STANDBY

#define WDCC_STANDBY   0xe2 /* set standby timer & enter standby */

Definition at line 137 of file wdcreg.h.

◆ WDCC_STANDBY_IMMED

#define WDCC_STANDBY_IMMED   0xe0 /* enter standby mode */

Definition at line 138 of file wdcreg.h.

◆ WDCC_UNLOCK

#define WDCC_UNLOCK   0xdf /* unlock drawer */

Definition at line 128 of file wdcreg.h.

◆ WDCC_WRITE

#define WDCC_WRITE   0x30 /* disk write code */

Definition at line 109 of file wdcreg.h.

Referenced by wdc_command().

◆ WDCC_WRITE_EXT

#define WDCC_WRITE_EXT   0x34 /* write 48-bit addressing */

Definition at line 153 of file wdcreg.h.

◆ WDCC_WRITEDMA

#define WDCC_WRITEDMA   0xca /* write with DMA */

Definition at line 124 of file wdcreg.h.

◆ WDCC_WRITEDMA_EXT

#define WDCC_WRITEDMA_EXT   0x35 /* write 48-bit addressing with DMA */

Definition at line 159 of file wdcreg.h.

◆ WDCC_WRITEMULTI

#define WDCC_WRITEMULTI   0xc5 /* write multiple */

Definition at line 120 of file wdcreg.h.

Referenced by wdc_command().

◆ WDCC_WRITEMULTI_EXT

#define WDCC_WRITEMULTI_EXT   0x39 /* write multiple 48-bit addressing */

Definition at line 156 of file wdcreg.h.

◆ WDCE_ABRT

#define WDCE_ABRT   0x04 /* aborted command */

Definition at line 98 of file wdcreg.h.

Referenced by wdc_command().

◆ WDCE_AMNF

#define WDCE_AMNF   0x01 /* address mark not found */

Definition at line 100 of file wdcreg.h.

◆ WDCE_BBK

#define WDCE_BBK   0x80 /* bad block detected */

Definition at line 92 of file wdcreg.h.

◆ WDCE_CRC

#define WDCE_CRC   0x80 /* CRC error (Ultra-DMA only) */

Definition at line 93 of file wdcreg.h.

◆ WDCE_IDNF

#define WDCE_IDNF   0x10 /* id not found */

Definition at line 96 of file wdcreg.h.

◆ WDCE_MC

#define WDCE_MC   0x20 /* media changed */

Definition at line 95 of file wdcreg.h.

◆ WDCE_MCR

#define WDCE_MCR   0x08 /* media change requested */

Definition at line 97 of file wdcreg.h.

◆ WDCE_TK0NF

#define WDCE_TK0NF   0x02 /* track 0 not found */

Definition at line 99 of file wdcreg.h.

◆ WDCE_UNC

#define WDCE_UNC   0x40 /* uncorrectable data error */

Definition at line 94 of file wdcreg.h.

◆ WDCI_CMD

#define WDCI_CMD   0x01 /* command(1) or data(0) */

Definition at line 213 of file wdcreg.h.

◆ WDCI_IN

#define WDCI_IN   0x02 /* transfer to(1) or from(0) the host */

Definition at line 214 of file wdcreg.h.

◆ WDCI_RELEASE

#define WDCI_RELEASE   0x04 /* bus released until completion */

Definition at line 215 of file wdcreg.h.

◆ WDCS_BITS

#define WDCS_BITS   "\020\010bsy\007drdy\006dwf\005dsc\004drq\003corr\002idx\001err"

Definition at line 86 of file wdcreg.h.

◆ WDCS_BSY

#define WDCS_BSY   0x80 /* busy */

Definition at line 78 of file wdcreg.h.

◆ WDCS_CORR

#define WDCS_CORR   0x04 /* corrected data */

Definition at line 83 of file wdcreg.h.

◆ WDCS_DRDY

#define WDCS_DRDY   0x40 /* drive ready */

Definition at line 79 of file wdcreg.h.

◆ WDCS_DRQ

#define WDCS_DRQ   0x08 /* data request */

Definition at line 82 of file wdcreg.h.

◆ WDCS_DSC

#define WDCS_DSC   0x10 /* drive seek complete */

Definition at line 81 of file wdcreg.h.

◆ WDCS_DWF

#define WDCS_DWF   0x20 /* drive write fault */

Definition at line 80 of file wdcreg.h.

◆ WDCS_ERR

#define WDCS_ERR   0x01 /* error */

Definition at line 85 of file wdcreg.h.

◆ WDCS_IDX

#define WDCS_IDX   0x02 /* index */

Definition at line 84 of file wdcreg.h.

◆ WDCTL_4BIT

#define WDCTL_4BIT   0x08 /* use four head bits (wd1003) */

Definition at line 68 of file wdcreg.h.

◆ WDCTL_IDS

#define WDCTL_IDS   0x02 /* disable controller interrupts */

Definition at line 70 of file wdcreg.h.

◆ WDCTL_RST

#define WDCTL_RST   0x04 /* reset the controller */

Definition at line 69 of file wdcreg.h.

◆ WDSD_CHS

#define WDSD_CHS   0x00 /* cylinder/head/sector addressing */

Definition at line 194 of file wdcreg.h.

◆ WDSD_IBM

#define WDSD_IBM   0xa0 /* forced to 512 byte sector, ecc */

Definition at line 193 of file wdcreg.h.

◆ WDSD_LBA

#define WDSD_LBA   0x40 /* logical block addressing */

Definition at line 195 of file wdcreg.h.

◆ WDSF_ECC_DS

#define WDSF_ECC_DS   0x77

Definition at line 169 of file wdcreg.h.

◆ WDSF_ECC_EN

#define WDSF_ECC_EN   0x88

Definition at line 172 of file wdcreg.h.

◆ WDSF_EN_WR_CACHE

#define WDSF_EN_WR_CACHE   0x02

Definition at line 162 of file wdcreg.h.

◆ WDSF_POD_DS

#define WDSF_POD_DS   0x66

Definition at line 168 of file wdcreg.h.

◆ WDSF_POD_EN

#define WDSF_POD_EN   0xcc

Definition at line 177 of file wdcreg.h.

◆ WDSF_PREFETCH_SET

#define WDSF_PREFETCH_SET   0xab

Definition at line 176 of file wdcreg.h.

◆ WDSF_READAHEAD_DS

#define WDSF_READAHEAD_DS   0x55

Definition at line 167 of file wdcreg.h.

◆ WDSF_READAHEAD_EN

#define WDSF_READAHEAD_EN   0xaa

Definition at line 175 of file wdcreg.h.

◆ WDSF_REASSIGN_DS

#define WDSF_REASSIGN_DS   0x84

Definition at line 171 of file wdcreg.h.

◆ WDSF_REASSIGN_EN

#define WDSF_REASSIGN_EN   0x04

Definition at line 164 of file wdcreg.h.

◆ WDSF_RETRY_DS

#define WDSF_RETRY_DS   0x33

Definition at line 165 of file wdcreg.h.

◆ WDSF_RETRY_EN

#define WDSF_RETRY_EN   0x99

Definition at line 173 of file wdcreg.h.

◆ WDSF_SET_CACHE_SGMT

#define WDSF_SET_CACHE_SGMT   0x54

Definition at line 166 of file wdcreg.h.

◆ WDSF_SET_CURRENT

#define WDSF_SET_CURRENT   0x9a

Definition at line 174 of file wdcreg.h.

◆ WDSF_SET_MODE

#define WDSF_SET_MODE   0x03

Definition at line 163 of file wdcreg.h.

Referenced by wdc_command().

◆ WDSF_WRITE_CACHE_DS

#define WDSF_WRITE_CACHE_DS   0x82

Definition at line 170 of file wdcreg.h.

◆ WDSM_ATTR_AUTOSAVE_EN

#define WDSM_ATTR_AUTOSAVE_EN   0xd2

Definition at line 181 of file wdcreg.h.

◆ WDSM_DISABLE_OPS

#define WDSM_DISABLE_OPS   0xd9

Definition at line 185 of file wdcreg.h.

◆ WDSM_ENABLE_OPS

#define WDSM_ENABLE_OPS   0xd8

Definition at line 184 of file wdcreg.h.

◆ WDSM_EXEC_OFFL_IMM

#define WDSM_EXEC_OFFL_IMM   0xd4

Definition at line 183 of file wdcreg.h.

◆ WDSM_RD_DATA

#define WDSM_RD_DATA   0xd0

Definition at line 180 of file wdcreg.h.

◆ WDSM_SAVE_ATTR

#define WDSM_SAVE_ATTR   0xd3

Definition at line 182 of file wdcreg.h.

◆ WDSM_STATUS

#define WDSM_STATUS   0xda

Definition at line 186 of file wdcreg.h.

◆ WDSMART_CYL_HI

#define WDSMART_CYL_HI   0xc2

Definition at line 189 of file wdcreg.h.

◆ WDSMART_CYL_LO

#define WDSMART_CYL_LO   0x4f

Definition at line 188 of file wdcreg.h.


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