79 *bus = (t >> 16) & 0xff;
80 *dev = (t >> 11) & 0x1f;
81 *func = (t >> 8) & 0x7;
86 fatal(
"[ bus_pci_decompose_1: WARNING: reg = 0x%02x ]\n",
97 uint64_t *
data,
int len,
int writeflag)
99 struct pci_device *dev;
100 unsigned char *cfg_base;
101 uint64_t x, idata = *
data;
105 dev = pci_data->first_device;
106 while (dev != NULL) {
107 if (dev->bus == pci_data->cur_bus &&
108 dev->function == pci_data->cur_func &&
109 dev->device == pci_data->cur_device)
117 if (pci_data->cur_reg == 0)
118 *data = (uint64_t) -1;
122 fatal(
"[ bus_pci_data_access(): write to non-existant" 123 " device, bus %i func %i device %i ]\n",
124 pci_data->cur_bus, pci_data->cur_func,
125 pci_data->cur_device);
131 if (pci_data->last_was_write_ffffffff &&
134 cfg_base = dev->cfg_mem_size;
136 cfg_base = dev->cfg_mem;
140 for (i=len-1; i>=0; i--) {
141 int ofs = pci_data->cur_reg + i;
143 x |= cfg_base[ofs & (PCI_CFG_MEM_SIZE - 1)];
148 debug(
"[ bus_pci: write to PCI DATA: data = 0x%08llx ]\n",
150 if (idata == 0xffffffffULL &&
153 pci_data->last_was_write_ffffffff = 1;
157 if (dev->cfg_reg_write == NULL ||
158 dev->cfg_reg_write(dev, pci_data->cur_reg, *data) == 0) {
160 debug(
"[ bus_pci: write to PCI DATA: data = 0x%08llx" 161 " (current value = 0x%08llx); NOT YET" 162 " SUPPORTED. bus %i, device %i, function %i (%s)" 163 " register 0x%02x ]\n", (
long long)idata,
164 (
long long)x, pci_data->cur_bus,
165 pci_data->cur_device, pci_data->cur_func,
166 dev->name, pci_data->cur_reg);
172 fatal(
"\n[ NetBSD PCI detection stuff not" 173 " yet implemented for device '%s' ]\n",
183 pci_data->last_was_write_ffffffff = 0;
185 debug(
"[ bus_pci: read from PCI DATA, bus %i, device " 186 "%i, function %i (%s) register 0x%02x: (len=%i) 0x%08lx ]\n",
187 pci_data->cur_bus, pci_data->cur_device, pci_data->cur_func,
188 dev->name, pci_data->cur_reg, len, (
long)*data);
198 int bus,
int device,
int function,
int reg)
200 if (cpu == NULL || pci_data == NULL) {
201 fatal(
"bus_pci_setaddr(): NULL ptr\n");
205 pci_data->cur_bus = bus;
206 pci_data->cur_device = device;
207 pci_data->cur_func =
function;
208 pci_data->cur_reg =
reg;
218 struct memory *mem,
int bus,
int device,
int function,
221 struct pci_device *pd;
223 void (*init)(
struct machine *,
struct memory *,
struct pci_device *);
225 if (pci_data == NULL) {
226 fatal(
"bus_pci_add(): pci_data == NULL!\n");
234 pd = pci_data->first_device;
236 if (pd->bus == bus && pd->device == device &&
237 pd->function ==
function) {
238 fatal(
"bus_pci_add(): (bus %i, device %i, function" 239 " %i) already in use\n", bus, device,
function);
245 CHECK_ALLOCATION(pd = (
struct pci_device *) malloc(
sizeof(
struct pci_device)));
246 memset(pd, 0,
sizeof(
struct pci_device));
249 pd->next = pci_data->first_device;
250 pci_data->first_device = pd;
253 pd->pcibus = pci_data;
256 pd->function =
function;
267 PCI_SET_DATA_SIZE(ofs, 0x00100000 - 1);
270 fatal(
"No init function for PCI device \"%s\"?\n", name);
275 init(machine, mem, pd);
289 static void allocate_device_space(
struct pci_device *pd,
290 uint64_t portsize, uint64_t memsize,
291 uint64_t *portp, uint64_t *memp)
296 port = pd->pcibus->cur_pci_portbase;
298 port = ((port - 1) | (portsize - 1)) + 1;
299 pd->pcibus->cur_pci_portbase = port;
303 ((portsize - 1) & ~0xf) | 0xd);
304 pd->cur_mapreg_offset +=
sizeof(uint32_t);
308 mem = pd->pcibus->cur_pci_membase;
310 mem = ((mem - 1) | (memsize - 1)) + 1;
311 pd->pcibus->cur_pci_membase = mem;
314 ((memsize - 1) & ~0xf) | 0x0);
315 pd->cur_mapreg_offset +=
sizeof(uint32_t);
318 *portp = port + pd->pcibus->pci_actual_io_offset;
319 *memp = mem + pd->pcibus->pci_actual_mem_offset;
322 debug(
"pci device '%s' at", pd->name);
324 debug(
" port 0x%llx-0x%llx", (
long long)pd->pcibus->
325 cur_pci_portbase, (
long long)(pd->pcibus->
326 cur_pci_portbase + portsize - 1));
328 debug(
" mem 0x%llx-0x%llx", (
long long)pd->pcibus->
329 cur_pci_membase, (
long long)(pd->pcibus->
330 cur_pci_membase + memsize - 1));
334 pd->pcibus->cur_pci_portbase += portsize;
335 pd->pcibus->cur_pci_membase += memsize;
357 uint64_t pci_actual_io_offset, uint64_t pci_actual_mem_offset,
358 uint64_t pci_portbase, uint64_t pci_membase,
const char *pci_irqbase,
359 uint64_t isa_portbase, uint64_t isa_membase,
const char *isa_irqbase)
364 memset(d, 0,
sizeof(
struct pci_data));
370 d->pci_actual_io_offset = pci_actual_io_offset;
371 d->pci_actual_mem_offset = pci_actual_mem_offset;
372 d->pci_portbase = pci_portbase;
373 d->pci_membase = pci_membase;
374 d->isa_portbase = isa_portbase;
375 d->isa_membase = isa_membase;
377 d->cur_pci_portbase = d->pci_portbase;
378 d->cur_pci_membase = d->pci_membase;
381 if (d->isa_portbase != 0 || d->isa_membase != 0) {
382 d->cur_pci_portbase += 0x10000;
383 d->cur_pci_membase += 0x10000;
407 #define PCI_VENDOR_INTEGRAPHICS 0x10ea 421 PCI_SET_DATA(0x10, 0x08000000);
423 snprintf(tmpstr,
sizeof(tmpstr),
"igsfb addr=0x%llx",
424 (
long long)(pd->pcibus->isa_membase + 0x08000000));
436 #define PCI_VENDOR_S3 0x5333 437 #define PCI_PRODUCT_S3_VIRGE 0x5631 438 #define PCI_PRODUCT_S3_VIRGE_DX 0x8a01 460 #define PCI_VENDOR_ALI 0x10b9 461 #define PCI_PRODUCT_ALI_M1543 0x1533 462 #define PCI_PRODUCT_ALI_M5229 0x5229 476 PCI_SET_DATA(0x44, 0x0000000e);
477 PCI_SET_DATA(0x58, 0x00000003);
483 0x7c000000, 0x80000000);
485 default:
fatal(
"ali_m1543 init: unimplemented machine type\n");
492 char tmpstr[300], irqstr[300];
503 snprintf(irqstr,
sizeof(irqstr),
"%s.10.isa",
504 pd->pcibus->irq_path);
506 default:
fatal(
"ali_m5229 init: unimplemented machine type\n");
512 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s.%i",
513 (
long long)(pd->pcibus->isa_portbase + 0x1f0),
527 #define PCI_VENDOR_ADP 0x9004 528 #define PCI_VENDOR_ADP2 0x9005 529 #define PCI_PRODUCT_ADP_2940U 0x8178 530 #define PCI_PRODUCT_ADP_2940UP 0x8778 561 PCI_SET_DATA(0x30, 0xef000000);
563 PCI_SET_DATA(0x38, 0x00000000);
591 #define PCI_VENDOR_GALILEO 0x11ab 592 #define PCI_PRODUCT_GALILEO_GT64011 0x4146 593 #define PCI_PRODUCT_GALILEO_GT64120 0x4620 594 #define PCI_PRODUCT_GALILEO_GT64260 0x6430 637 #define PCI_VENDOR_AMD 0x1022 638 #define PCI_PRODUCT_AMD_PCNET_PCI 0x2000 656 default:
fatal(
"pcn in non-implemented machine type %i\n",
681 #define PCI_VENDOR_INTEL 0x8086 682 #define PCI_PRODUCT_INTEL_31244 0x3200 683 #define PCI_PRODUCT_INTEL_82371SB_ISA 0x7000 684 #define PCI_PRODUCT_INTEL_82371SB_IDE 0x7010 685 #define PCI_PRODUCT_INTEL_82371AB_ISA 0x7110 686 #define PCI_PRODUCT_INTEL_82371AB_IDE 0x7111 687 #define PCI_PRODUCT_INTEL_SIO 0x0484 691 uint64_t port, memaddr;
705 default:
fatal(
"i31244 in non-implemented machine type %i\n",
712 allocate_device_space(pd, 0x1000, 0, &port, &memaddr);
713 allocate_device_space(pd, 0x1000, 0, &port, &memaddr);
719 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s.%i",
720 (
long long)(pd->pcibus->pci_actual_io_offset + 0),
721 pd->pcibus->irq_path_pci, irq & 255);
735 PCI_SET_DATA(reg, value);
779 PCI_SET_DATA(0x40, 0x20);
782 PCI_SET_DATA(0x60, 0x0f0e0b0a);
796 PCI_SET_DATA(reg, value);
832 PCI_SET_DATA(0x40, 0x80008000);
840 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx " 841 "irq=%s.isa.%i", (
long long)(pd->pcibus->isa_portbase +
842 0x1f0), pd->pcibus->irq_path_isa, 14);
849 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx " 850 "irq=%s.isa.%i", (
long long)(pd->pcibus->isa_portbase +
851 0x170), pd->pcibus->irq_path_isa, 15);
873 PCI_SET_DATA(0x20, 1);
877 PCI_SET_DATA(0x40, 0x80008000);
885 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s." 886 "isa.%i", (
long long)(pd->pcibus->isa_portbase + 0x1f0),
887 pd->pcibus->irq_path_isa, 14);
894 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s." 895 "isa.%i", (
long long)(pd->pcibus->isa_portbase + 0x170),
896 pd->pcibus->irq_path_isa, 15);
910 #define PCI_VENDOR_IBM 0x1014 911 #define PCI_PRODUCT_IBM_ISABRIDGE 0x000a 931 #define PCI_VENDOR_HEURICON 0x1223 932 #define PCI_PRODUCT_HEURICON_PMPPC 0x000e 957 #define PCI_VENDOR_VIATECH 0x1106 958 #define PCI_PRODUCT_VIATECH_VT82C586_IDE 0x1571 960 #define PCI_PRODUCT_VIATECH_VT82C586_ISA 0x0586 980 #define COBALT_PCIB_BOARD_ID_REG 0x94 981 #define COBALT_QUBE2_ID 5 1024 PCI_SET_DATA(0x40, 0x00000003);
1032 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s." 1033 "isa.%i", (
long long)(pd->pcibus->isa_portbase + 0x1f0),
1034 pd->pcibus->irq_path_isa, 14);
1041 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s." 1042 "isa.%i", (
long long)(pd->pcibus->isa_portbase + 0x170),
1043 pd->pcibus->irq_path_isa, 15);
1058 #define PCI_VENDOR_SYMPHONY 0x10ad 1059 #define PCI_PRODUCT_SYMPHONY_83C553 0x0565 1060 #define PCI_PRODUCT_SYMPHONY_82C105 0x0105 1076 0, 0x7c000000, 0x80000000);
1078 default:
fatal(
"symphony_83c553 init: unimplemented machine type\n");
1095 printf(
"reg = 0x%x\n", reg);
1100 printf(
" value = 0x%" PRIx32
"\n", value);
1106 PCI_SET_DATA(reg, value);
1114 PCI_SET_DATA(reg, value);
1137 PCI_SET_DATA(0x40, 0x00000003);
1146 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s." 1147 "isa.%i", (
long long)(pd->pcibus->isa_portbase + 0x1f0),
1148 pd->pcibus->irq_path_isa, 14);
1155 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s." 1156 "isa.%i", (
long long)(pd->pcibus->isa_portbase + 0x170),
1157 pd->pcibus->irq_path_isa, 15);
1171 #define PCI_VENDOR_REALTEK 0x10ec 1172 #define PCI_PRODUCT_REALTEK_RT8139 0x8139 1176 uint64_t port, memaddr;
1177 int pci_int_line = 0x101, irq = 0;
1190 pci_int_line = 0x105;
1192 default:
fatal(
"rtl8139c for this machine has not been " 1193 "implemented yet\n");
1199 allocate_device_space(pd, 0x100, 0, &port, &memaddr);
1201 snprintf(irqstr,
sizeof(irqstr),
"%s.%i",
1202 pd->pcibus->irq_path_pci, irq);
1204 snprintf(tmpstr,
sizeof(tmpstr),
"rtl8139c addr=0x%llx " 1205 "irq=%s pci_little_endian=1", (
long long)port, irqstr);
1216 #define PCI_VENDOR_DEC 0x1011 1217 #define PCI_PRODUCT_DEC_21142 0x0019 1221 uint64_t port, memaddr;
1222 int pci_int_line = 0x101, irq = 0, isa = 0;
1240 pci_int_line = 0x101;
1245 pci_int_line = 0x407;
1250 pci_int_line = 0x20a;
1255 pci_int_line = 0x40a;
1260 pci_int_line = 0x101;
1265 pci_int_line = 0x101;
1271 allocate_device_space(pd, 0x100, 0x100, &port, &memaddr);
1274 snprintf(irqstr,
sizeof(irqstr),
"%s.isa.%i",
1275 pd->pcibus->irq_path_isa, irq);
1277 snprintf(irqstr,
sizeof(irqstr),
"%s.%i",
1278 pd->pcibus->irq_path_pci, irq);
1280 snprintf(tmpstr,
sizeof(tmpstr),
"dec21143 addr=0x%llx addr2=0x%llx " 1281 "irq=%s pci_little_endian=1", (
long long)port,
1282 (
long long)memaddr, irqstr);
1293 #define PCI_PRODUCT_DEC_21030 0x0004 1316 PCI_SET_DATA(0x10, 0x00000008);
1317 PCI_SET_DATA(0x30, 0x08000001);
1328 base = 0x100000000ULL;
1330 default:
fatal(
"dec21030 in non-implemented machine type %i\n",
1335 snprintf(tmpstr,
sizeof(tmpstr),
"dec21030 addr=0x%llx",
1348 #define PCI_VENDOR_MOT 0x1057 1349 #define PCI_PRODUCT_MOT_MPC105 0x0001 1372 #define PCI_VENDOR_APPLE 0x106b 1373 #define PCI_PRODUCT_APPLE_GC 0x0002 1374 #define PCI_PRODUCT_APPLE_UNINORTH1 0x001e 1378 uint64_t port, memaddr;
1391 allocate_device_space(pd, 0x10000, 0x10000, &port, &memaddr);
1396 uint64_t port, memaddr;
1408 allocate_device_space(pd, 0x10000, 0x10000, &port, &memaddr);
1417 #define PCI_VENDOR_ATI 0x1002 1418 #define PCI_PRODUCT_ATI_RADEON_9200_2 0x5962 1422 uint64_t port, memaddr;
1432 allocate_device_space(pd, 0x1000, 0x400000, &port, &memaddr);
#define PCI_PRODUCT_INTEL_82371SB_IDE
#define PCI_PRODUCT_VIATECH_VT82C586_ISA
void fatal(const char *fmt,...)
#define PCI_PRODUCT_INTEL_82371AB_ISA
#define COBALT_PCIB_BOARD_ID_REG
int diskimage_exist(struct machine *machine, int id, int type)
#define PCI_SUBCLASS_SYSTEM_PIC
int wdc_set_io_enabled(struct wdc_data *d, int io_enabled)
#define PCI_MAPREG_TYPE_IO
#define PCI_VENDOR_SYMPHONY
void dev_vga_init(struct machine *machine, struct memory *mem, uint64_t videomem_base, uint64_t control_base, const char *name)
#define PCI_INTERRUPT_REG
#define PCI_PRODUCT_DEC_21030
#define PCI_PRODUCT_ALI_M5229
void bus_pci_add(struct machine *machine, struct pci_data *pci_data, struct memory *mem, int bus, int device, int function, const char *name)
#define PCI_SUBCLASS_BRIDGE_HOST
#define PCI_PRODUCT_ALI_M1543
#define MACHINE_NETWINDER
#define PCI_ID_CODE(vid, pid)
#define PCI_PRODUCT_MOT_MPC105
#define PCI_VENDOR_REALTEK
#define PCI_PRODUCT_INTEL_82371SB_ISA
#define PCI_VENDOR_VIATECH
#define BUS_ISA_PCKBC_FORCE_USE
#define PCI_PRODUCT_VIATECH_VT82C586_IDE
#define PCI_PRODUCT_INTEL_SIO
void * device_add(struct machine *machine, const char *name_and_params)
#define PCI_CAPLISTPTR_REG
#define PCI_SUBCLASS_MASS_STORAGE_SCSI
#define PCI_PRODUCT_DEC_21142
#define PCI_PRODUCT_INTEL_31244
#define CHECK_ALLOCATION(ptr)
#define PCI_VENDOR_HEURICON
int symphony_82c105_cfg_reg_write(struct pci_device *pd, int reg, uint32_t value)
#define PCI_COMMAND_STATUS_REG
#define PCI_PRODUCT_S3_VIRGE_DX
void bus_pci_setaddr(struct cpu *cpu, struct pci_data *pci_data, int bus, int device, int function, int reg)
#define PCI_PRODUCT_GALILEO_GT64011
#define PCI_CLASS_NETWORK
void dev_ram_init(struct machine *machine, uint64_t baseaddr, uint64_t length, int mode, uint64_t otheraddress, const char *name)
#define PCI_PRODUCT_GALILEO_GT64260
#define PCI_PRODUCT_HEURICON_PMPPC
void(*)(struct machine *machine, struct memory *mem, struct pci_device *pd) pci_lookup_initf(const char *name)
#define PCI_SUBCLASS_DISPLAY_VGA
#define PCI_CLASS_CODE(mainclass, subclass, interface)
#define PCI_VENDOR_INTEGRAPHICS
#define PCI_PRODUCT_SYMPHONY_82C105
#define PCI_COMMAND_MEM_ENABLE
#define PCI_PRODUCT_APPLE_UNINORTH1
int vt82c586_ide_cfg_reg_write(struct pci_device *pd, int reg, uint32_t value)
#define PCI_VENDOR_GALILEO
struct bus_isa_data * bus_isa_init(struct machine *machine, char *interrupt_base_path, uint32_t bus_isa_flags, uint64_t isa_portbase, uint64_t isa_membase)
#define PCI_PRODUCT_APPLE_GC
#define PCI_PRODUCT_SYMPHONY_83C553
#define PCI_CLASS_DISPLAY
#define PCI_PRODUCT_AMD_PCNET_PCI
void bus_pci_decompose_1(uint32_t t, int *bus, int *dev, int *func, int *reg)
#define PCI_PRODUCT_ADP_2940U
struct pci_data * bus_pci_init(struct machine *machine, const char *irq_path, uint64_t pci_actual_io_offset, uint64_t pci_actual_mem_offset, uint64_t pci_portbase, uint64_t pci_membase, const char *pci_irqbase, uint64_t isa_portbase, uint64_t isa_membase, const char *isa_irqbase)
#define PCI_SUBCLASS_NETWORK_ETHERNET
#define PCI_PRODUCT_INTEL_82371AB_IDE
#define PCI_SUBCLASS_BRIDGE_ISA
#define PCI_SUBCLASS_MASS_STORAGE_IDE
int piix_ide_cfg_reg_write(struct pci_device *pd, int reg, uint32_t value)
void bus_pci_data_access(struct cpu *cpu, struct pci_data *pci_data, uint64_t *data, int len, int writeflag)
int piix_isa_cfg_reg_write(struct pci_device *pd, int reg, uint32_t value)
#define PCI_PRODUCT_REALTEK_RT8139
#define PCI_PRODUCT_IBM_ISABRIDGE
#define PCI_CLASS_MASS_STORAGE
#define PCI_COMMAND_IO_ENABLE
#define BUS_ISA_PCKBC_NONPCSTYLE
const char * machine_name
#define PCI_PRODUCT_GALILEO_GT64120
#define PCI_BHLC_CODE(bist, type, multi, latency, cacheline)
#define PCI_PRODUCT_ATI_RADEON_9200_2