dec_kn03.h File Reference

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Macros
dec_kn03.h File Reference

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Macros

#define KN03_PHYS_MIN   0x00000000 /* 512 Meg */
 
#define KN03_PHYS_MAX   0x1fffffff
 
#define KN03_PHYS_MEMORY_START   0x00000000
 
#define KN03_PHYS_MEMORY_END   0x1dffffff /* 480 Meg */
 
#define KN03_PHYS_TC_0_START   0x1e000000 /* TURBOchannel, slot 0 */
 
#define KN03_PHYS_TC_0_END   0x1e7fffff /* 8 Meg, option0 */
 
#define KN03_PHYS_TC_1_START   0x1e800000 /* TURBOchannel, slot 1 */
 
#define KN03_PHYS_TC_1_END   0x1effffff /* 8 Meg, option1 */
 
#define KN03_PHYS_TC_2_START   0x1f000000 /* TURBOchannel, slot 2 */
 
#define KN03_PHYS_TC_2_END   0x1f7fffff /* 8 Meg, option2 */
 
#define KN03_PHYS_TC_3_START   0x1f800000 /* TURBOchannel, slot 3 */
 
#define KN03_PHYS_TC_3_END   0x1fffffff /* 8 Meg, system devices */
 
#define KN03_PHYS_TC_START   KN03_PHYS_TC_0_START
 
#define KN03_PHYS_TC_END   KN03_PHYS_TC_3_END
 
#define KN03_TC_NSLOTS   4
 
#define KN03_TC_MIN   0
 
#define KN03_TC_MAX   2 /* don't look at system slot */
 
#define KN03_SYS_ASIC   ( KN03_PHYS_TC_3_START + 0x0000000 )
 
#define KN03_SYS_ROM_START   ( KN03_SYS_ASIC + IOASIC_SLOT_0_START )
 
#define KN03_SYS_ASIC_REGS   ( KN03_SYS_ASIC + IOASIC_SLOT_1_START )
 
#define KN03_SYS_ETHER_ADDRESS   ( KN03_SYS_ASIC + IOASIC_SLOT_2_START )
 
#define KN03_SYS_LANCE   ( KN03_SYS_ASIC + IOASIC_SLOT_3_START )
 
#define KN03_SYS_SCC_0   ( KN03_SYS_ASIC + IOASIC_SLOT_4_START )
 
#define KN03_SYS_SCC_1   ( KN03_SYS_ASIC + IOASIC_SLOT_6_START )
 
#define KN03_SYS_CLOCK   ( KN03_SYS_ASIC + IOASIC_SLOT_8_START )
 
#define KN03_SYS_ERRADR   ( KN03_SYS_ASIC + IOASIC_SLOT_9_START )
 
#define KN03_SYS_ERRSYN   ( KN03_SYS_ASIC + IOASIC_SLOT_10_START )
 
#define KN03_SYS_CSR   ( KN03_SYS_ASIC + IOASIC_SLOT_11_START )
 
#define KN03_SYS_SCSI   ( KN03_SYS_ASIC + IOASIC_SLOT_12_START )
 
#define KN03_SYS_SCSI_DMA   ( KN03_SYS_ASIC + IOASIC_SLOT_14_START )
 
#define KN03_SYS_BOOT_ROM_START   ( KN03_PHYS_TC_3_START + 0x400000 )
 
#define KN03_SYS_BOOT_ROM_END   ( KN03_PHYS_TC_3_START + 0x43ffff )
 
#define KN03_INT_FPA   IP_LEV7 /* Floating Point coproc */
 
#define KN03_INT_HALTB   IP_LEV6 /* Halt button */
 
#define KN03_INT_MEM   IP_LEV5 /* Memory Errors */
 
#define KN03_INT_RTC   IP_LEV3 /* RTC clock */
 
#define KN03_INT_ASIC   IP_LEV2 /* All turbochannel */
 
#define KN03_REG_SCSI_DMAPTR   ( KN03_SYS_ASIC + IOASIC_SCSI_DMAPTR )
 
#define KN03_REG_SCSI_DMANPTR   ( KN03_SYS_ASIC + IOASIC_SCSI_NEXTPTR )
 
#define KN03_REG_LANCE_DMAPTR   ( KN03_SYS_ASIC + IOASIC_LANCE_DMAPTR )
 
#define KN03_REG_SCC_T1_DMAPTR   ( KN03_SYS_ASIC + IOASIC_SCC_T1_DMAPTR )
 
#define KN03_REG_SCC_R1_DMAPTR   ( KN03_SYS_ASIC + IOASIC_SCC_R1_DMAPTR )
 
#define KN03_REG_SCC_T2_DMAPTR   ( KN03_SYS_ASIC + IOASIC_SCC_T2_DMAPTR )
 
#define KN03_REG_SCC_R2_DMAPTR   ( KN03_SYS_ASIC + IOASIC_SCC_R2_DMAPTR )
 
#define KN03_REG_CSR   ( KN03_SYS_ASIC + IOASIC_CSR )
 
#define KN03_REG_INTR   ( KN03_SYS_ASIC + IOASIC_INTR )
 
#define KN03_REG_IMSK   ( KN03_SYS_ASIC + IOASIC_IMSK )
 
#define KN03_REG_CURADDR   ( KN03_SYS_ASIC + IOASIC_CURADDR )
 
#define KN03_REG_LANCE_DECODE   ( KN03_SYS_ASIC + IOASIC_LANCE_DECODE )
 
#define KN03_REG_SCSI_DECODE   ( KN03_SYS_ASIC + IOASIC_SCSI_DECODE )
 
#define KN03_REG_SCC0_DECODE   ( KN03_SYS_ASIC + IOASIC_SCC0_DECODE )
 
#define KN03_REG_SCC1_DECODE   ( KN03_SYS_ASIC + IOASIC_SCC1_DECODE )
 
#define KN03_LANCE_CONFIG   3
 
#define KN03_SCSI_CONFIG   14
 
#define KN03_SCC0_CONFIG   (0x10|4)
 
#define KN03_SCC1_CONFIG   (0x10|6)
 
#define KN03_REG_SCSI_SCR   ( KN03_SYS_ASIC + IOASIC_SCSI_SCR )
 
#define KN03_REG_SCSI_SDR0   ( KN03_SYS_ASIC + IOASIC_SCSI_SDR0 )
 
#define KN03_REG_SCSI_SDR1   ( KN03_SYS_ASIC + IOASIC_SCSI_SDR1 )
 
#define KN03_CSR_LEDS   0x000000ff /* rw */
 
#define KN03_CSR_BNK32M   0x00000400 /* rw Memory bank stride */
 
#define KN03_CSR_CORRECT   0x00002000 /* rw ECC corrects single bit */
 
#define KN03_CSR_ECCMD   0x0000c000 /* rw ECC logic mode */
 
#define KN03_INTR_PBNO   0x00000001 /* ro */
 
#define KN03_INTR_PBNC   0x00000002 /* ro */
 
#define KN03_INTR_SCSI_FIFO   0x00000004 /* ro */
 
#define KN03_INTR_PSWARN   0x00000010 /* ro */
 
#define KN03_INTR_CLOCK   0x00000020 /* ro */
 
#define KN03_INTR_SCC_0   0x00000040 /* ro */
 
#define KN03_INTR_SCC_1   0x00000080 /* ro */
 
#define KN03_INTR_LANCE   0x00000100 /* ro */
 
#define KN03_INTR_SCSI   0x00000200 /* ro */
 
#define KN03_INTR_NRMOD_JUMPER   0x00000400 /* ro */
 
#define KN03_INTR_TC_0   0x00000800 /* ro */
 
#define KN03_INTR_TC_1   0x00001000 /* ro */
 
#define KN03_INTR_TC_2   0x00002000 /* ro */
 
#define KN03_INTR_NVR_JUMPER   0x00004000 /* ro */
 
#define KN03_INTR_PROD_JUMPER   0x00008000 /* ro */
 
#define KN03_INTR_ASIC   0xff0f0004
 
#define KN03_IM0   0xff0f3bf0 /* all good ones enabled */
 
#define KN03_ERR_ADDRESS   0x07ffffff /* phys address */
 
#define KN03_ERR_RESERVED   0x08000000 /* unused */
 
#define KN03_ERR_ECCERR   0x10000000 /* ECC error */
 
#define KN03_ERR_WRITE   0x20000000 /* read/write transaction */
 
#define KN03_ERR_CPU   0x40000000 /* CPU or device initiator */
 
#define KN03_ERR_VALID   0x80000000 /* Info is valid */
 
#define KN03_ECC_SYNLO   0x0000007f /* syndrome, even bank */
 
#define KN03_ECC_SNGLO   0x00000080 /* single bit err, " */
 
#define KN03_ECC_CHKLO   0x00007f00 /* check bits, " " */
 
#define KN03_ECC_VLDLO   0x00008000 /* info valid for " */
 
#define KN03_ECC_SYNHI   0x007f0000 /* syndrome, odd bank */
 
#define KN03_ECC_SNGHI   0x00800000 /* single bit err, " */
 
#define KN03_ECC_CHKHI   0x7f000000 /* check bits, " " */
 
#define KN03_ECC_VLDHI   0x80000000 /* info valid for " */
 

Macro Definition Documentation

◆ KN03_CSR_BNK32M

#define KN03_CSR_BNK32M   0x00000400 /* rw Memory bank stride */

Definition at line 183 of file dec_kn03.h.

◆ KN03_CSR_CORRECT

#define KN03_CSR_CORRECT   0x00002000 /* rw ECC corrects single bit */

Definition at line 184 of file dec_kn03.h.

◆ KN03_CSR_ECCMD

#define KN03_CSR_ECCMD   0x0000c000 /* rw ECC logic mode */

Definition at line 185 of file dec_kn03.h.

◆ KN03_CSR_LEDS

#define KN03_CSR_LEDS   0x000000ff /* rw */

Definition at line 182 of file dec_kn03.h.

◆ KN03_ECC_CHKHI

#define KN03_ECC_CHKHI   0x7f000000 /* check bits, " " */

Definition at line 225 of file dec_kn03.h.

◆ KN03_ECC_CHKLO

#define KN03_ECC_CHKLO   0x00007f00 /* check bits, " " */

Definition at line 221 of file dec_kn03.h.

◆ KN03_ECC_SNGHI

#define KN03_ECC_SNGHI   0x00800000 /* single bit err, " */

Definition at line 224 of file dec_kn03.h.

◆ KN03_ECC_SNGLO

#define KN03_ECC_SNGLO   0x00000080 /* single bit err, " */

Definition at line 220 of file dec_kn03.h.

◆ KN03_ECC_SYNHI

#define KN03_ECC_SYNHI   0x007f0000 /* syndrome, odd bank */

Definition at line 223 of file dec_kn03.h.

◆ KN03_ECC_SYNLO

#define KN03_ECC_SYNLO   0x0000007f /* syndrome, even bank */

Definition at line 219 of file dec_kn03.h.

◆ KN03_ECC_VLDHI

#define KN03_ECC_VLDHI   0x80000000 /* info valid for " */

Definition at line 226 of file dec_kn03.h.

◆ KN03_ECC_VLDLO

#define KN03_ECC_VLDLO   0x00008000 /* info valid for " */

Definition at line 222 of file dec_kn03.h.

◆ KN03_ERR_ADDRESS

#define KN03_ERR_ADDRESS   0x07ffffff /* phys address */

Definition at line 211 of file dec_kn03.h.

◆ KN03_ERR_CPU

#define KN03_ERR_CPU   0x40000000 /* CPU or device initiator */

Definition at line 215 of file dec_kn03.h.

◆ KN03_ERR_ECCERR

#define KN03_ERR_ECCERR   0x10000000 /* ECC error */

Definition at line 213 of file dec_kn03.h.

◆ KN03_ERR_RESERVED

#define KN03_ERR_RESERVED   0x08000000 /* unused */

Definition at line 212 of file dec_kn03.h.

◆ KN03_ERR_VALID

#define KN03_ERR_VALID   0x80000000 /* Info is valid */

Definition at line 216 of file dec_kn03.h.

◆ KN03_ERR_WRITE

#define KN03_ERR_WRITE   0x20000000 /* read/write transaction */

Definition at line 214 of file dec_kn03.h.

◆ KN03_IM0

#define KN03_IM0   0xff0f3bf0 /* all good ones enabled */

Definition at line 206 of file dec_kn03.h.

◆ KN03_INT_ASIC

#define KN03_INT_ASIC   IP_LEV2 /* All turbochannel */

Definition at line 138 of file dec_kn03.h.

◆ KN03_INT_FPA

#define KN03_INT_FPA   IP_LEV7 /* Floating Point coproc */

Definition at line 134 of file dec_kn03.h.

◆ KN03_INT_HALTB

#define KN03_INT_HALTB   IP_LEV6 /* Halt button */

Definition at line 135 of file dec_kn03.h.

◆ KN03_INT_MEM

#define KN03_INT_MEM   IP_LEV5 /* Memory Errors */

Definition at line 136 of file dec_kn03.h.

◆ KN03_INT_RTC

#define KN03_INT_RTC   IP_LEV3 /* RTC clock */

Definition at line 137 of file dec_kn03.h.

◆ KN03_INTR_ASIC

#define KN03_INTR_ASIC   0xff0f0004

Definition at line 205 of file dec_kn03.h.

◆ KN03_INTR_CLOCK

#define KN03_INTR_CLOCK   0x00000020 /* ro */

Definition at line 193 of file dec_kn03.h.

◆ KN03_INTR_LANCE

#define KN03_INTR_LANCE   0x00000100 /* ro */

Definition at line 196 of file dec_kn03.h.

◆ KN03_INTR_NRMOD_JUMPER

#define KN03_INTR_NRMOD_JUMPER   0x00000400 /* ro */

Definition at line 198 of file dec_kn03.h.

◆ KN03_INTR_NVR_JUMPER

#define KN03_INTR_NVR_JUMPER   0x00004000 /* ro */

Definition at line 202 of file dec_kn03.h.

◆ KN03_INTR_PBNC

#define KN03_INTR_PBNC   0x00000002 /* ro */

Definition at line 190 of file dec_kn03.h.

◆ KN03_INTR_PBNO

#define KN03_INTR_PBNO   0x00000001 /* ro */

Definition at line 189 of file dec_kn03.h.

◆ KN03_INTR_PROD_JUMPER

#define KN03_INTR_PROD_JUMPER   0x00008000 /* ro */

Definition at line 203 of file dec_kn03.h.

◆ KN03_INTR_PSWARN

#define KN03_INTR_PSWARN   0x00000010 /* ro */

Definition at line 192 of file dec_kn03.h.

◆ KN03_INTR_SCC_0

#define KN03_INTR_SCC_0   0x00000040 /* ro */

Definition at line 194 of file dec_kn03.h.

◆ KN03_INTR_SCC_1

#define KN03_INTR_SCC_1   0x00000080 /* ro */

Definition at line 195 of file dec_kn03.h.

◆ KN03_INTR_SCSI

#define KN03_INTR_SCSI   0x00000200 /* ro */

Definition at line 197 of file dec_kn03.h.

◆ KN03_INTR_SCSI_FIFO

#define KN03_INTR_SCSI_FIFO   0x00000004 /* ro */

Definition at line 191 of file dec_kn03.h.

◆ KN03_INTR_TC_0

#define KN03_INTR_TC_0   0x00000800 /* ro */

Definition at line 199 of file dec_kn03.h.

Referenced by MACHINE_SETUP().

◆ KN03_INTR_TC_1

#define KN03_INTR_TC_1   0x00001000 /* ro */

Definition at line 200 of file dec_kn03.h.

Referenced by MACHINE_SETUP().

◆ KN03_INTR_TC_2

#define KN03_INTR_TC_2   0x00002000 /* ro */

Definition at line 201 of file dec_kn03.h.

Referenced by MACHINE_SETUP().

◆ KN03_LANCE_CONFIG

#define KN03_LANCE_CONFIG   3

Definition at line 156 of file dec_kn03.h.

◆ KN03_PHYS_MAX

#define KN03_PHYS_MAX   0x1fffffff

Definition at line 82 of file dec_kn03.h.

◆ KN03_PHYS_MEMORY_END

#define KN03_PHYS_MEMORY_END   0x1dffffff /* 480 Meg */

Definition at line 88 of file dec_kn03.h.

◆ KN03_PHYS_MEMORY_START

#define KN03_PHYS_MEMORY_START   0x00000000

Definition at line 87 of file dec_kn03.h.

◆ KN03_PHYS_MIN

#define KN03_PHYS_MIN   0x00000000 /* 512 Meg */

Definition at line 81 of file dec_kn03.h.

◆ KN03_PHYS_TC_0_END

#define KN03_PHYS_TC_0_END   0x1e7fffff /* 8 Meg, option0 */

Definition at line 94 of file dec_kn03.h.

Referenced by MACHINE_SETUP().

◆ KN03_PHYS_TC_0_START

#define KN03_PHYS_TC_0_START   0x1e000000 /* TURBOchannel, slot 0 */

Definition at line 93 of file dec_kn03.h.

Referenced by MACHINE_SETUP().

◆ KN03_PHYS_TC_1_END

#define KN03_PHYS_TC_1_END   0x1effffff /* 8 Meg, option1 */

Definition at line 97 of file dec_kn03.h.

Referenced by MACHINE_SETUP().

◆ KN03_PHYS_TC_1_START

#define KN03_PHYS_TC_1_START   0x1e800000 /* TURBOchannel, slot 1 */

Definition at line 96 of file dec_kn03.h.

Referenced by MACHINE_SETUP().

◆ KN03_PHYS_TC_2_END

#define KN03_PHYS_TC_2_END   0x1f7fffff /* 8 Meg, option2 */

Definition at line 100 of file dec_kn03.h.

Referenced by MACHINE_SETUP().

◆ KN03_PHYS_TC_2_START

#define KN03_PHYS_TC_2_START   0x1f000000 /* TURBOchannel, slot 2 */

Definition at line 99 of file dec_kn03.h.

Referenced by MACHINE_SETUP().

◆ KN03_PHYS_TC_3_END

#define KN03_PHYS_TC_3_END   0x1fffffff /* 8 Meg, system devices */

Definition at line 103 of file dec_kn03.h.

◆ KN03_PHYS_TC_3_START

#define KN03_PHYS_TC_3_START   0x1f800000 /* TURBOchannel, slot 3 */

Definition at line 102 of file dec_kn03.h.

◆ KN03_PHYS_TC_END

#define KN03_PHYS_TC_END   KN03_PHYS_TC_3_END

Definition at line 106 of file dec_kn03.h.

◆ KN03_PHYS_TC_START

#define KN03_PHYS_TC_START   KN03_PHYS_TC_0_START

Definition at line 105 of file dec_kn03.h.

◆ KN03_REG_CSR

#define KN03_REG_CSR   ( KN03_SYS_ASIC + IOASIC_CSR )

Definition at line 147 of file dec_kn03.h.

◆ KN03_REG_CURADDR

#define KN03_REG_CURADDR   ( KN03_SYS_ASIC + IOASIC_CURADDR )

Definition at line 150 of file dec_kn03.h.

◆ KN03_REG_IMSK

#define KN03_REG_IMSK   ( KN03_SYS_ASIC + IOASIC_IMSK )

Definition at line 149 of file dec_kn03.h.

◆ KN03_REG_INTR

#define KN03_REG_INTR   ( KN03_SYS_ASIC + IOASIC_INTR )

Definition at line 148 of file dec_kn03.h.

◆ KN03_REG_LANCE_DECODE

#define KN03_REG_LANCE_DECODE   ( KN03_SYS_ASIC + IOASIC_LANCE_DECODE )

Definition at line 152 of file dec_kn03.h.

◆ KN03_REG_LANCE_DMAPTR

#define KN03_REG_LANCE_DMAPTR   ( KN03_SYS_ASIC + IOASIC_LANCE_DMAPTR )

Definition at line 142 of file dec_kn03.h.

◆ KN03_REG_SCC0_DECODE

#define KN03_REG_SCC0_DECODE   ( KN03_SYS_ASIC + IOASIC_SCC0_DECODE )

Definition at line 154 of file dec_kn03.h.

◆ KN03_REG_SCC1_DECODE

#define KN03_REG_SCC1_DECODE   ( KN03_SYS_ASIC + IOASIC_SCC1_DECODE )

Definition at line 155 of file dec_kn03.h.

◆ KN03_REG_SCC_R1_DMAPTR

#define KN03_REG_SCC_R1_DMAPTR   ( KN03_SYS_ASIC + IOASIC_SCC_R1_DMAPTR )

Definition at line 144 of file dec_kn03.h.

◆ KN03_REG_SCC_R2_DMAPTR

#define KN03_REG_SCC_R2_DMAPTR   ( KN03_SYS_ASIC + IOASIC_SCC_R2_DMAPTR )

Definition at line 146 of file dec_kn03.h.

◆ KN03_REG_SCC_T1_DMAPTR

#define KN03_REG_SCC_T1_DMAPTR   ( KN03_SYS_ASIC + IOASIC_SCC_T1_DMAPTR )

Definition at line 143 of file dec_kn03.h.

◆ KN03_REG_SCC_T2_DMAPTR

#define KN03_REG_SCC_T2_DMAPTR   ( KN03_SYS_ASIC + IOASIC_SCC_T2_DMAPTR )

Definition at line 145 of file dec_kn03.h.

◆ KN03_REG_SCSI_DECODE

#define KN03_REG_SCSI_DECODE   ( KN03_SYS_ASIC + IOASIC_SCSI_DECODE )

Definition at line 153 of file dec_kn03.h.

◆ KN03_REG_SCSI_DMANPTR

#define KN03_REG_SCSI_DMANPTR   ( KN03_SYS_ASIC + IOASIC_SCSI_NEXTPTR )

Definition at line 141 of file dec_kn03.h.

◆ KN03_REG_SCSI_DMAPTR

#define KN03_REG_SCSI_DMAPTR   ( KN03_SYS_ASIC + IOASIC_SCSI_DMAPTR )

Definition at line 140 of file dec_kn03.h.

◆ KN03_REG_SCSI_SCR

#define KN03_REG_SCSI_SCR   ( KN03_SYS_ASIC + IOASIC_SCSI_SCR )

Definition at line 161 of file dec_kn03.h.

◆ KN03_REG_SCSI_SDR0

#define KN03_REG_SCSI_SDR0   ( KN03_SYS_ASIC + IOASIC_SCSI_SDR0 )

Definition at line 162 of file dec_kn03.h.

◆ KN03_REG_SCSI_SDR1

#define KN03_REG_SCSI_SDR1   ( KN03_SYS_ASIC + IOASIC_SCSI_SDR1 )

Definition at line 163 of file dec_kn03.h.

◆ KN03_SCC0_CONFIG

#define KN03_SCC0_CONFIG   (0x10|4)

Definition at line 158 of file dec_kn03.h.

◆ KN03_SCC1_CONFIG

#define KN03_SCC1_CONFIG   (0x10|6)

Definition at line 159 of file dec_kn03.h.

◆ KN03_SCSI_CONFIG

#define KN03_SCSI_CONFIG   14

Definition at line 157 of file dec_kn03.h.

◆ KN03_SYS_ASIC

#define KN03_SYS_ASIC   ( KN03_PHYS_TC_3_START + 0x0000000 )

Definition at line 115 of file dec_kn03.h.

◆ KN03_SYS_ASIC_REGS

#define KN03_SYS_ASIC_REGS   ( KN03_SYS_ASIC + IOASIC_SLOT_1_START )

Definition at line 117 of file dec_kn03.h.

◆ KN03_SYS_BOOT_ROM_END

#define KN03_SYS_BOOT_ROM_END   ( KN03_PHYS_TC_3_START + 0x43ffff )

Definition at line 129 of file dec_kn03.h.

◆ KN03_SYS_BOOT_ROM_START

#define KN03_SYS_BOOT_ROM_START   ( KN03_PHYS_TC_3_START + 0x400000 )

Definition at line 128 of file dec_kn03.h.

◆ KN03_SYS_CLOCK

#define KN03_SYS_CLOCK   ( KN03_SYS_ASIC + IOASIC_SLOT_8_START )

Definition at line 122 of file dec_kn03.h.

◆ KN03_SYS_CSR

#define KN03_SYS_CSR   ( KN03_SYS_ASIC + IOASIC_SLOT_11_START )

Definition at line 125 of file dec_kn03.h.

◆ KN03_SYS_ERRADR

#define KN03_SYS_ERRADR   ( KN03_SYS_ASIC + IOASIC_SLOT_9_START )

Definition at line 123 of file dec_kn03.h.

◆ KN03_SYS_ERRSYN

#define KN03_SYS_ERRSYN   ( KN03_SYS_ASIC + IOASIC_SLOT_10_START )

Definition at line 124 of file dec_kn03.h.

◆ KN03_SYS_ETHER_ADDRESS

#define KN03_SYS_ETHER_ADDRESS   ( KN03_SYS_ASIC + IOASIC_SLOT_2_START )

Definition at line 118 of file dec_kn03.h.

◆ KN03_SYS_LANCE

#define KN03_SYS_LANCE   ( KN03_SYS_ASIC + IOASIC_SLOT_3_START )

Definition at line 119 of file dec_kn03.h.

◆ KN03_SYS_ROM_START

#define KN03_SYS_ROM_START   ( KN03_SYS_ASIC + IOASIC_SLOT_0_START )

Definition at line 116 of file dec_kn03.h.

◆ KN03_SYS_SCC_0

#define KN03_SYS_SCC_0   ( KN03_SYS_ASIC + IOASIC_SLOT_4_START )

Definition at line 120 of file dec_kn03.h.

◆ KN03_SYS_SCC_1

#define KN03_SYS_SCC_1   ( KN03_SYS_ASIC + IOASIC_SLOT_6_START )

Definition at line 121 of file dec_kn03.h.

◆ KN03_SYS_SCSI

#define KN03_SYS_SCSI   ( KN03_SYS_ASIC + IOASIC_SLOT_12_START )

Definition at line 126 of file dec_kn03.h.

◆ KN03_SYS_SCSI_DMA

#define KN03_SYS_SCSI_DMA   ( KN03_SYS_ASIC + IOASIC_SLOT_14_START )

Definition at line 127 of file dec_kn03.h.

◆ KN03_TC_MAX

#define KN03_TC_MAX   2 /* don't look at system slot */

Definition at line 110 of file dec_kn03.h.

◆ KN03_TC_MIN

#define KN03_TC_MIN   0

Definition at line 109 of file dec_kn03.h.

◆ KN03_TC_NSLOTS

#define KN03_TC_NSLOTS   4

Definition at line 108 of file dec_kn03.h.


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