memory_arm.cc Source File

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memory_arm.cc
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1 /*
2  * Copyright (C) 2005-2009 Anders Gavare. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * 1. Redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution.
12  * 3. The name of the author may not be used to endorse or promote products
13  * derived from this software without specific prior written permission.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  *
28  * TODO/NOTE: The B and/or C bits could also cause the return value to
29  * be MEMORY_NOT_FULL_PAGE, to make sure it doesn't get entered into the
30  * translation arrays. TODO: Find out if this is a good thing to do.
31  */
32 
33 #include <stdio.h>
34 #include <stdlib.h>
35 #include <string.h>
36 
37 #include "arm_cpu_types.h"
38 #include "cpu.h"
39 #include "memory.h"
40 #include "misc.h"
41 
42 
43 extern int quiet_mode;
44 
45 
46 /*
47  * arm_translate_v2p():
48  *
49  * Address translation with the MMU disabled. (Just treat the virtual address
50  * as a physical address.)
51  */
52 int arm_translate_v2p(struct cpu *cpu, uint64_t vaddr64,
53  uint64_t *return_paddr, int flags)
54 {
55  *return_paddr = vaddr64 & 0xffffffff;
56 
57  return 2;
58 }
59 
60 
61 /*
62  * arm_check_access():
63  *
64  * Helper function. Returns 0 for no access, 1 for read-only, and 2 for
65  * read/write.
66  */
67 static int arm_check_access(struct cpu *cpu, int ap, int dav, int user)
68 {
69  int s, r;
70 
71  switch (dav) {
72  case 0: /* No access at all. */
73  return 0;
74  case 1: /* Normal access check. */
75  break;
76  case 2: fatal("arm_check_access(): 1 shouldn't be used\n");
77  exit(1);
78  case 3: /* Anything is allowed. */
79  return 2;
80  }
81 
82  switch (ap) {
83  case 0: s = (cpu->cd.arm.control & ARM_CONTROL_S)? 1 : 0;
84  r = (cpu->cd.arm.control & ARM_CONTROL_R)? 2 : 0;
85  switch (s + r) {
86  case 0: return 0;
87  case 1: return user? 0 : 1;
88  case 2: return 1;
89  }
90  fatal("arm_check_access: UNPREDICTABLE s+r value!\n");
91  return 0;
92  case 1: return user? 0 : 2;
93  case 2: return user? 1 : 2;
94  }
95 
96  /* "case 3": */
97  return 2;
98 }
99 
100 
101 /*
102  * arm_translate_v2p_mmu():
103  *
104  * Return values:
105  * 0 Failure
106  * 1 Success, the page is readable only
107  * 2 Success, the page is read/write
108  *
109  * If this is a 1KB page access, then the return value is ORed with
110  * MEMORY_NOT_FULL_PAGE.
111  */
112 int arm_translate_v2p_mmu(struct cpu *cpu, uint64_t vaddr64,
113  uint64_t *return_paddr, int flags)
114 {
115  unsigned char *q;
116  uint32_t addr, d=0, d2 = (uint32_t)(int32_t)-1, ptba, vaddr = vaddr64;
117  int instr = flags & FLAG_INSTR;
118  int writeflag = (flags & FLAG_WRITEFLAG)? 1 : 0;
119  int useraccess = flags & MEMORY_USER_ACCESS;
120  int no_exceptions = flags & FLAG_NOEXCEPTIONS;
121  int user = (cpu->cd.arm.cpsr & ARM_FLAG_MODE) == ARM_MODE_USR32;
122  int domain, dav, ap0,ap1,ap2,ap3, ap = 0, access = 0;
123  int fs = 2; /* fault status (2 = terminal exception) */
124  int subpage = 0;
125 
126  if (useraccess)
127  user = 1;
128 
129  addr = ((vaddr & 0xfff00000ULL) >> 18);
130 
131  if (cpu->cd.arm.translation_table == NULL ||
132  cpu->cd.arm.ttb != cpu->cd.arm.last_ttb) {
134  cpu->mem, cpu->cd.arm.ttb & 0x0fffffff, 0);
135  cpu->cd.arm.last_ttb = cpu->cd.arm.ttb;
136  }
137 
138  if (cpu->cd.arm.translation_table != NULL) {
139  d = *(uint32_t *)(cpu->cd.arm.translation_table + addr);
140 #ifdef HOST_LITTLE_ENDIAN
141  if (cpu->byte_order == EMUL_BIG_ENDIAN)
142 #else
143  if (cpu->byte_order == EMUL_LITTLE_ENDIAN)
144 #endif
145  d = ((d & 0xff) << 24) | ((d & 0xff00) << 8) |
146  ((d & 0xff0000) >> 8) | ((d & 0xff000000) >> 24);
147  }
148 
149  /* Get the domain from the descriptor, and the Domain Access Value: */
150  domain = (d >> 5) & 15;
151  dav = (cpu->cd.arm.dacr >> (domain * 2)) & 3;
152 
153  switch (d & 3) {
154 
155  case 0: domain = 0;
156  fs = FAULT_TRANS_S;
157  goto exception_return;
158 
159  case 1: /* Course Pagetable: */
160  if (dav == 0) {
161  fs = FAULT_DOMAIN_P;
162  goto exception_return;
163  }
164  ptba = d & 0xfffffc00;
165  addr = ptba + ((vaddr & 0x000ff000) >> 10);
166 
167  q = memory_paddr_to_hostaddr(cpu->mem, addr & 0x0fffffff, 0);
168  if (q == NULL) {
169  printf("arm memory blah blah adfh asfg asdgasdg\n");
170  exit(1);
171  }
172  d2 = *(uint32_t *)(q);
173 #ifdef HOST_LITTLE_ENDIAN
174  if (cpu->byte_order == EMUL_BIG_ENDIAN)
175 #else
176  if (cpu->byte_order == EMUL_LITTLE_ENDIAN)
177 #endif
178  d2 = ((d2 & 0xff) << 24) | ((d2 & 0xff00) << 8) |
179  ((d2 & 0xff0000) >> 8) | ((d2 & 0xff000000) >> 24);
180 
181  switch (d2 & 3) {
182  case 0: fs = FAULT_TRANS_P;
183  goto exception_return;
184  case 1: /* 16KB page: */
185  ap = (d2 >> 4) & 255;
186  switch (vaddr & 0x0000c000) {
187  case 0x4000: ap >>= 2; break;
188  case 0x8000: ap >>= 4; break;
189  case 0xc000: ap >>= 6; break;
190  }
191  ap &= 3;
192  *return_paddr = (d2 & 0xffff0000)|(vaddr & 0x0000ffff);
193  break;
194  case 3: if (cpu->cd.arm.cpu_type.flags & ARM_XSCALE) {
195  /* 4KB page (Xscale) */
196  subpage = 0;
197  } else {
198  /* 1KB page */
199  subpage = 1;
200  ap = (d2 >> 4) & 3;
201  *return_paddr = (d2 & 0xfffffc00) |
202  (vaddr & 0x000003ff);
203  break;
204  }
205  /* NOTE: Fall-through for XScale! */
206  case 2: /* 4KB page: */
207  ap3 = (d2 >> 10) & 3;
208  ap2 = (d2 >> 8) & 3;
209  ap1 = (d2 >> 6) & 3;
210  ap0 = (d2 >> 4) & 3;
211  switch (vaddr & 0x00000c00) {
212  case 0x000: ap = ap0; break;
213  case 0x400: ap = ap1; break;
214  case 0x800: ap = ap2; break;
215  default: ap = ap3;
216  }
217  /* NOTE: Ugly hack for XScale: */
218  if ((d2 & 3) == 3) {
219  /* Treated as 4KB page: */
220  ap = ap0;
221  } else {
222  if (ap0 != ap1 || ap0 != ap2 || ap0 != ap3)
223  subpage = 1;
224  }
225  *return_paddr = (d2 & 0xfffff000)|(vaddr & 0x00000fff);
226  break;
227  }
228  access = arm_check_access(cpu, ap, dav, user);
229  if (access > writeflag)
230  return access | (subpage? MEMORY_NOT_FULL_PAGE : 0);
231  fs = FAULT_PERM_P;
232  goto exception_return;
233 
234  case 2: /* Section descriptor: */
235  if (dav == 0) {
236  fs = FAULT_DOMAIN_S;
237  goto exception_return;
238  }
239  *return_paddr = (d & 0xfff00000) | (vaddr & 0x000fffff);
240  ap = (d >> 10) & 3;
241  access = arm_check_access(cpu, ap, dav, user);
242  if (access > writeflag)
243  return access;
244  fs = FAULT_PERM_S;
245  goto exception_return;
246 
247  default:fatal("TODO: descriptor for vaddr 0x%08x: 0x%08x ("
248  "unimplemented type %i)\n", vaddr, d, d&3);
249  exit(1);
250  }
251 
252 exception_return:
253  if (no_exceptions)
254  return 0;
255 
256  if (!quiet_mode) {
257  fatal("{ arm memory fault: vaddr=0x%08x domain=%i dav=%i ap=%i "
258  "access=%i user=%i", (int)vaddr, domain, dav, ap,
259  access, user);
260  fatal(" d=0x%08x d2=0x%08x pc=0x%08x }\n", d, d2, (int)cpu->pc);
261  }
262 
263  if (instr)
265  else {
266  cpu->cd.arm.far = vaddr;
267  cpu->cd.arm.fsr = (domain << 4) | fs;
269  }
270 
271  return 0;
272 }
273 
#define FAULT_PERM_S
Definition: armreg.h:336
void fatal(const char *fmt,...)
Definition: main.cc:152
uint32_t last_ttb
Definition: cpu_arm.h:222
uint32_t ttb
Definition: cpu_arm.h:181
int arm_translate_v2p_mmu(struct cpu *cpu, uint64_t vaddr64, uint64_t *return_paddr, int flags)
Definition: memory_arm.cc:112
#define FLAG_NOEXCEPTIONS
Definition: memory.h:137
#define ARM_CONTROL_R
Definition: cpu_arm.h:252
struct arm_cpu_type_def cpu_type
Definition: cpu_arm.h:133
#define MEMORY_NOT_FULL_PAGE
Definition: memory.h:143
uint32_t far
Definition: cpu_arm.h:184
union cpu::@1 cd
struct memory * mem
Definition: cpu.h:362
#define ARM_EXCEPTION_DATA_ABT
Definition: cpu_arm.h:119
#define instr(n)
#define FAULT_DOMAIN_P
Definition: armreg.h:335
struct arm_cpu arm
Definition: cpu.h:441
uint32_t control
Definition: cpu_arm.h:179
uint32_t fsr
Definition: cpu_arm.h:183
#define EMUL_LITTLE_ENDIAN
Definition: misc.h:164
uint64_t pc
Definition: cpu.h:383
#define FAULT_PERM_P
Definition: armreg.h:337
void arm_exception(struct cpu *cpu, int exception_nr)
Definition: cpu_arm.cc:589
#define FLAG_INSTR
Definition: memory.h:138
int arm_translate_v2p(struct cpu *cpu, uint64_t vaddr64, uint64_t *return_paddr, int flags)
Definition: memory_arm.cc:52
#define ARM_CONTROL_S
Definition: cpu_arm.h:251
#define FAULT_TRANS_S
Definition: armreg.h:332
uint32_t addr
#define ARM_EXCEPTION_PREF_ABT
Definition: cpu_arm.h:118
#define ARM_XSCALE
Definition: arm_cpu_types.h:42
uint32_t dacr
Definition: cpu_arm.h:182
#define ARM_MODE_USR32
Definition: cpu_arm.h:101
Definition: cpu.h:326
#define MEMORY_USER_ACCESS
Definition: memory.h:127
#define FLAG_WRITEFLAG
Definition: memory.h:136
int quiet_mode
Definition: main.cc:78
uint8_t byte_order
Definition: cpu.h:347
#define ARM_FLAG_MODE
Definition: cpu_arm.h:96
uint32_t cpsr
Definition: cpu_arm.h:167
unsigned char * translation_table
Definition: cpu_arm.h:221
#define FAULT_TRANS_P
Definition: armreg.h:333
#define FAULT_DOMAIN_S
Definition: armreg.h:334
#define EMUL_BIG_ENDIAN
Definition: misc.h:165
unsigned char * memory_paddr_to_hostaddr(struct memory *mem, uint64_t paddr, int writeflag)
Definition: memory.cc:495

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