10 #define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers 12 #define reg(x) (*((uint32_t *)(x))) 16 #define A__NAME__general arm_instr_store_w1_word_u1_p1_imm__general 17 #define A__NAME arm_instr_store_w1_word_u1_p1_imm 18 #define A__NAME__eq arm_instr_store_w1_word_u1_p1_imm__eq 19 #define A__NAME__ne arm_instr_store_w1_word_u1_p1_imm__ne 20 #define A__NAME__cs arm_instr_store_w1_word_u1_p1_imm__cs 21 #define A__NAME__cc arm_instr_store_w1_word_u1_p1_imm__cc 22 #define A__NAME__mi arm_instr_store_w1_word_u1_p1_imm__mi 23 #define A__NAME__pl arm_instr_store_w1_word_u1_p1_imm__pl 24 #define A__NAME__vs arm_instr_store_w1_word_u1_p1_imm__vs 25 #define A__NAME__vc arm_instr_store_w1_word_u1_p1_imm__vc 26 #define A__NAME__hi arm_instr_store_w1_word_u1_p1_imm__hi 27 #define A__NAME__ls arm_instr_store_w1_word_u1_p1_imm__ls 28 #define A__NAME__ge arm_instr_store_w1_word_u1_p1_imm__ge 29 #define A__NAME__lt arm_instr_store_w1_word_u1_p1_imm__lt 30 #define A__NAME__gt arm_instr_store_w1_word_u1_p1_imm__gt 31 #define A__NAME__le arm_instr_store_w1_word_u1_p1_imm__le 32 #define A__NAME_PC arm_instr_store_w1_word_u1_p1_imm_pc 33 #define A__NAME_PC__eq arm_instr_store_w1_word_u1_p1_imm_pc__eq 34 #define A__NAME_PC__ne arm_instr_store_w1_word_u1_p1_imm_pc__ne 35 #define A__NAME_PC__cs arm_instr_store_w1_word_u1_p1_imm_pc__cs 36 #define A__NAME_PC__cc arm_instr_store_w1_word_u1_p1_imm_pc__cc 37 #define A__NAME_PC__mi arm_instr_store_w1_word_u1_p1_imm_pc__mi 38 #define A__NAME_PC__pl arm_instr_store_w1_word_u1_p1_imm_pc__pl 39 #define A__NAME_PC__vs arm_instr_store_w1_word_u1_p1_imm_pc__vs 40 #define A__NAME_PC__vc arm_instr_store_w1_word_u1_p1_imm_pc__vc 41 #define A__NAME_PC__hi arm_instr_store_w1_word_u1_p1_imm_pc__hi 42 #define A__NAME_PC__ls arm_instr_store_w1_word_u1_p1_imm_pc__ls 43 #define A__NAME_PC__ge arm_instr_store_w1_word_u1_p1_imm_pc__ge 44 #define A__NAME_PC__lt arm_instr_store_w1_word_u1_p1_imm_pc__lt 45 #define A__NAME_PC__gt arm_instr_store_w1_word_u1_p1_imm_pc__gt 46 #define A__NAME_PC__le arm_instr_store_w1_word_u1_p1_imm_pc__le 82 #undef A__NAME__general 85 #define A__NAME__general arm_instr_load_w1_word_u1_p1_imm__general 86 #define A__NAME arm_instr_load_w1_word_u1_p1_imm 87 #define A__NAME__eq arm_instr_load_w1_word_u1_p1_imm__eq 88 #define A__NAME__ne arm_instr_load_w1_word_u1_p1_imm__ne 89 #define A__NAME__cs arm_instr_load_w1_word_u1_p1_imm__cs 90 #define A__NAME__cc arm_instr_load_w1_word_u1_p1_imm__cc 91 #define A__NAME__mi arm_instr_load_w1_word_u1_p1_imm__mi 92 #define A__NAME__pl arm_instr_load_w1_word_u1_p1_imm__pl 93 #define A__NAME__vs arm_instr_load_w1_word_u1_p1_imm__vs 94 #define A__NAME__vc arm_instr_load_w1_word_u1_p1_imm__vc 95 #define A__NAME__hi arm_instr_load_w1_word_u1_p1_imm__hi 96 #define A__NAME__ls arm_instr_load_w1_word_u1_p1_imm__ls 97 #define A__NAME__ge arm_instr_load_w1_word_u1_p1_imm__ge 98 #define A__NAME__lt arm_instr_load_w1_word_u1_p1_imm__lt 99 #define A__NAME__gt arm_instr_load_w1_word_u1_p1_imm__gt 100 #define A__NAME__le arm_instr_load_w1_word_u1_p1_imm__le 101 #define A__NAME_PC arm_instr_load_w1_word_u1_p1_imm_pc 102 #define A__NAME_PC__eq arm_instr_load_w1_word_u1_p1_imm_pc__eq 103 #define A__NAME_PC__ne arm_instr_load_w1_word_u1_p1_imm_pc__ne 104 #define A__NAME_PC__cs arm_instr_load_w1_word_u1_p1_imm_pc__cs 105 #define A__NAME_PC__cc arm_instr_load_w1_word_u1_p1_imm_pc__cc 106 #define A__NAME_PC__mi arm_instr_load_w1_word_u1_p1_imm_pc__mi 107 #define A__NAME_PC__pl arm_instr_load_w1_word_u1_p1_imm_pc__pl 108 #define A__NAME_PC__vs arm_instr_load_w1_word_u1_p1_imm_pc__vs 109 #define A__NAME_PC__vc arm_instr_load_w1_word_u1_p1_imm_pc__vc 110 #define A__NAME_PC__hi arm_instr_load_w1_word_u1_p1_imm_pc__hi 111 #define A__NAME_PC__ls arm_instr_load_w1_word_u1_p1_imm_pc__ls 112 #define A__NAME_PC__ge arm_instr_load_w1_word_u1_p1_imm_pc__ge 113 #define A__NAME_PC__lt arm_instr_load_w1_word_u1_p1_imm_pc__lt 114 #define A__NAME_PC__gt arm_instr_load_w1_word_u1_p1_imm_pc__gt 115 #define A__NAME_PC__le arm_instr_load_w1_word_u1_p1_imm_pc__le 139 #undef A__NAME_PC__eq 140 #undef A__NAME_PC__ne 141 #undef A__NAME_PC__cs 142 #undef A__NAME_PC__cc 143 #undef A__NAME_PC__mi 144 #undef A__NAME_PC__pl 145 #undef A__NAME_PC__vs 146 #undef A__NAME_PC__vc 147 #undef A__NAME_PC__hi 148 #undef A__NAME_PC__ls 149 #undef A__NAME_PC__ge 150 #undef A__NAME_PC__lt 151 #undef A__NAME_PC__gt 152 #undef A__NAME_PC__le 153 #undef A__NAME__general 156 #define A__NAME__general arm_instr_store_w1_byte_u1_p1_imm__general 157 #define A__NAME arm_instr_store_w1_byte_u1_p1_imm 158 #define A__NAME__eq arm_instr_store_w1_byte_u1_p1_imm__eq 159 #define A__NAME__ne arm_instr_store_w1_byte_u1_p1_imm__ne 160 #define A__NAME__cs arm_instr_store_w1_byte_u1_p1_imm__cs 161 #define A__NAME__cc arm_instr_store_w1_byte_u1_p1_imm__cc 162 #define A__NAME__mi arm_instr_store_w1_byte_u1_p1_imm__mi 163 #define A__NAME__pl arm_instr_store_w1_byte_u1_p1_imm__pl 164 #define A__NAME__vs arm_instr_store_w1_byte_u1_p1_imm__vs 165 #define A__NAME__vc arm_instr_store_w1_byte_u1_p1_imm__vc 166 #define A__NAME__hi arm_instr_store_w1_byte_u1_p1_imm__hi 167 #define A__NAME__ls arm_instr_store_w1_byte_u1_p1_imm__ls 168 #define A__NAME__ge arm_instr_store_w1_byte_u1_p1_imm__ge 169 #define A__NAME__lt arm_instr_store_w1_byte_u1_p1_imm__lt 170 #define A__NAME__gt arm_instr_store_w1_byte_u1_p1_imm__gt 171 #define A__NAME__le arm_instr_store_w1_byte_u1_p1_imm__le 172 #define A__NAME_PC arm_instr_store_w1_byte_u1_p1_imm_pc 173 #define A__NAME_PC__eq arm_instr_store_w1_byte_u1_p1_imm_pc__eq 174 #define A__NAME_PC__ne arm_instr_store_w1_byte_u1_p1_imm_pc__ne 175 #define A__NAME_PC__cs arm_instr_store_w1_byte_u1_p1_imm_pc__cs 176 #define A__NAME_PC__cc arm_instr_store_w1_byte_u1_p1_imm_pc__cc 177 #define A__NAME_PC__mi arm_instr_store_w1_byte_u1_p1_imm_pc__mi 178 #define A__NAME_PC__pl arm_instr_store_w1_byte_u1_p1_imm_pc__pl 179 #define A__NAME_PC__vs arm_instr_store_w1_byte_u1_p1_imm_pc__vs 180 #define A__NAME_PC__vc arm_instr_store_w1_byte_u1_p1_imm_pc__vc 181 #define A__NAME_PC__hi arm_instr_store_w1_byte_u1_p1_imm_pc__hi 182 #define A__NAME_PC__ls arm_instr_store_w1_byte_u1_p1_imm_pc__ls 183 #define A__NAME_PC__ge arm_instr_store_w1_byte_u1_p1_imm_pc__ge 184 #define A__NAME_PC__lt arm_instr_store_w1_byte_u1_p1_imm_pc__lt 185 #define A__NAME_PC__gt arm_instr_store_w1_byte_u1_p1_imm_pc__gt 186 #define A__NAME_PC__le arm_instr_store_w1_byte_u1_p1_imm_pc__le 210 #undef A__NAME_PC__eq 211 #undef A__NAME_PC__ne 212 #undef A__NAME_PC__cs 213 #undef A__NAME_PC__cc 214 #undef A__NAME_PC__mi 215 #undef A__NAME_PC__pl 216 #undef A__NAME_PC__vs 217 #undef A__NAME_PC__vc 218 #undef A__NAME_PC__hi 219 #undef A__NAME_PC__ls 220 #undef A__NAME_PC__ge 221 #undef A__NAME_PC__lt 222 #undef A__NAME_PC__gt 223 #undef A__NAME_PC__le 224 #undef A__NAME__general 227 #define A__NAME__general arm_instr_load_w1_byte_u1_p1_imm__general 228 #define A__NAME arm_instr_load_w1_byte_u1_p1_imm 229 #define A__NAME__eq arm_instr_load_w1_byte_u1_p1_imm__eq 230 #define A__NAME__ne arm_instr_load_w1_byte_u1_p1_imm__ne 231 #define A__NAME__cs arm_instr_load_w1_byte_u1_p1_imm__cs 232 #define A__NAME__cc arm_instr_load_w1_byte_u1_p1_imm__cc 233 #define A__NAME__mi arm_instr_load_w1_byte_u1_p1_imm__mi 234 #define A__NAME__pl arm_instr_load_w1_byte_u1_p1_imm__pl 235 #define A__NAME__vs arm_instr_load_w1_byte_u1_p1_imm__vs 236 #define A__NAME__vc arm_instr_load_w1_byte_u1_p1_imm__vc 237 #define A__NAME__hi arm_instr_load_w1_byte_u1_p1_imm__hi 238 #define A__NAME__ls arm_instr_load_w1_byte_u1_p1_imm__ls 239 #define A__NAME__ge arm_instr_load_w1_byte_u1_p1_imm__ge 240 #define A__NAME__lt arm_instr_load_w1_byte_u1_p1_imm__lt 241 #define A__NAME__gt arm_instr_load_w1_byte_u1_p1_imm__gt 242 #define A__NAME__le arm_instr_load_w1_byte_u1_p1_imm__le 243 #define A__NAME_PC arm_instr_load_w1_byte_u1_p1_imm_pc 244 #define A__NAME_PC__eq arm_instr_load_w1_byte_u1_p1_imm_pc__eq 245 #define A__NAME_PC__ne arm_instr_load_w1_byte_u1_p1_imm_pc__ne 246 #define A__NAME_PC__cs arm_instr_load_w1_byte_u1_p1_imm_pc__cs 247 #define A__NAME_PC__cc arm_instr_load_w1_byte_u1_p1_imm_pc__cc 248 #define A__NAME_PC__mi arm_instr_load_w1_byte_u1_p1_imm_pc__mi 249 #define A__NAME_PC__pl arm_instr_load_w1_byte_u1_p1_imm_pc__pl 250 #define A__NAME_PC__vs arm_instr_load_w1_byte_u1_p1_imm_pc__vs 251 #define A__NAME_PC__vc arm_instr_load_w1_byte_u1_p1_imm_pc__vc 252 #define A__NAME_PC__hi arm_instr_load_w1_byte_u1_p1_imm_pc__hi 253 #define A__NAME_PC__ls arm_instr_load_w1_byte_u1_p1_imm_pc__ls 254 #define A__NAME_PC__ge arm_instr_load_w1_byte_u1_p1_imm_pc__ge 255 #define A__NAME_PC__lt arm_instr_load_w1_byte_u1_p1_imm_pc__lt 256 #define A__NAME_PC__gt arm_instr_load_w1_byte_u1_p1_imm_pc__gt 257 #define A__NAME_PC__le arm_instr_load_w1_byte_u1_p1_imm_pc__le 283 #undef A__NAME_PC__eq 284 #undef A__NAME_PC__ne 285 #undef A__NAME_PC__cs 286 #undef A__NAME_PC__cc 287 #undef A__NAME_PC__mi 288 #undef A__NAME_PC__pl 289 #undef A__NAME_PC__vs 290 #undef A__NAME_PC__vc 291 #undef A__NAME_PC__hi 292 #undef A__NAME_PC__ls 293 #undef A__NAME_PC__ge 294 #undef A__NAME_PC__lt 295 #undef A__NAME_PC__gt 296 #undef A__NAME_PC__le 297 #undef A__NAME__general 300 #define A__NAME__general arm_instr_store_w1_word_u1_p1_reg__general 301 #define A__NAME arm_instr_store_w1_word_u1_p1_reg 302 #define A__NAME__eq arm_instr_store_w1_word_u1_p1_reg__eq 303 #define A__NAME__ne arm_instr_store_w1_word_u1_p1_reg__ne 304 #define A__NAME__cs arm_instr_store_w1_word_u1_p1_reg__cs 305 #define A__NAME__cc arm_instr_store_w1_word_u1_p1_reg__cc 306 #define A__NAME__mi arm_instr_store_w1_word_u1_p1_reg__mi 307 #define A__NAME__pl arm_instr_store_w1_word_u1_p1_reg__pl 308 #define A__NAME__vs arm_instr_store_w1_word_u1_p1_reg__vs 309 #define A__NAME__vc arm_instr_store_w1_word_u1_p1_reg__vc 310 #define A__NAME__hi arm_instr_store_w1_word_u1_p1_reg__hi 311 #define A__NAME__ls arm_instr_store_w1_word_u1_p1_reg__ls 312 #define A__NAME__ge arm_instr_store_w1_word_u1_p1_reg__ge 313 #define A__NAME__lt arm_instr_store_w1_word_u1_p1_reg__lt 314 #define A__NAME__gt arm_instr_store_w1_word_u1_p1_reg__gt 315 #define A__NAME__le arm_instr_store_w1_word_u1_p1_reg__le 316 #define A__NAME_PC arm_instr_store_w1_word_u1_p1_reg_pc 317 #define A__NAME_PC__eq arm_instr_store_w1_word_u1_p1_reg_pc__eq 318 #define A__NAME_PC__ne arm_instr_store_w1_word_u1_p1_reg_pc__ne 319 #define A__NAME_PC__cs arm_instr_store_w1_word_u1_p1_reg_pc__cs 320 #define A__NAME_PC__cc arm_instr_store_w1_word_u1_p1_reg_pc__cc 321 #define A__NAME_PC__mi arm_instr_store_w1_word_u1_p1_reg_pc__mi 322 #define A__NAME_PC__pl arm_instr_store_w1_word_u1_p1_reg_pc__pl 323 #define A__NAME_PC__vs arm_instr_store_w1_word_u1_p1_reg_pc__vs 324 #define A__NAME_PC__vc arm_instr_store_w1_word_u1_p1_reg_pc__vc 325 #define A__NAME_PC__hi arm_instr_store_w1_word_u1_p1_reg_pc__hi 326 #define A__NAME_PC__ls arm_instr_store_w1_word_u1_p1_reg_pc__ls 327 #define A__NAME_PC__ge arm_instr_store_w1_word_u1_p1_reg_pc__ge 328 #define A__NAME_PC__lt arm_instr_store_w1_word_u1_p1_reg_pc__lt 329 #define A__NAME_PC__gt arm_instr_store_w1_word_u1_p1_reg_pc__gt 330 #define A__NAME_PC__le arm_instr_store_w1_word_u1_p1_reg_pc__le 354 #undef A__NAME_PC__eq 355 #undef A__NAME_PC__ne 356 #undef A__NAME_PC__cs 357 #undef A__NAME_PC__cc 358 #undef A__NAME_PC__mi 359 #undef A__NAME_PC__pl 360 #undef A__NAME_PC__vs 361 #undef A__NAME_PC__vc 362 #undef A__NAME_PC__hi 363 #undef A__NAME_PC__ls 364 #undef A__NAME_PC__ge 365 #undef A__NAME_PC__lt 366 #undef A__NAME_PC__gt 367 #undef A__NAME_PC__le 368 #undef A__NAME__general 371 #define A__NAME__general arm_instr_load_w1_word_u1_p1_reg__general 372 #define A__NAME arm_instr_load_w1_word_u1_p1_reg 373 #define A__NAME__eq arm_instr_load_w1_word_u1_p1_reg__eq 374 #define A__NAME__ne arm_instr_load_w1_word_u1_p1_reg__ne 375 #define A__NAME__cs arm_instr_load_w1_word_u1_p1_reg__cs 376 #define A__NAME__cc arm_instr_load_w1_word_u1_p1_reg__cc 377 #define A__NAME__mi arm_instr_load_w1_word_u1_p1_reg__mi 378 #define A__NAME__pl arm_instr_load_w1_word_u1_p1_reg__pl 379 #define A__NAME__vs arm_instr_load_w1_word_u1_p1_reg__vs 380 #define A__NAME__vc arm_instr_load_w1_word_u1_p1_reg__vc 381 #define A__NAME__hi arm_instr_load_w1_word_u1_p1_reg__hi 382 #define A__NAME__ls arm_instr_load_w1_word_u1_p1_reg__ls 383 #define A__NAME__ge arm_instr_load_w1_word_u1_p1_reg__ge 384 #define A__NAME__lt arm_instr_load_w1_word_u1_p1_reg__lt 385 #define A__NAME__gt arm_instr_load_w1_word_u1_p1_reg__gt 386 #define A__NAME__le arm_instr_load_w1_word_u1_p1_reg__le 387 #define A__NAME_PC arm_instr_load_w1_word_u1_p1_reg_pc 388 #define A__NAME_PC__eq arm_instr_load_w1_word_u1_p1_reg_pc__eq 389 #define A__NAME_PC__ne arm_instr_load_w1_word_u1_p1_reg_pc__ne 390 #define A__NAME_PC__cs arm_instr_load_w1_word_u1_p1_reg_pc__cs 391 #define A__NAME_PC__cc arm_instr_load_w1_word_u1_p1_reg_pc__cc 392 #define A__NAME_PC__mi arm_instr_load_w1_word_u1_p1_reg_pc__mi 393 #define A__NAME_PC__pl arm_instr_load_w1_word_u1_p1_reg_pc__pl 394 #define A__NAME_PC__vs arm_instr_load_w1_word_u1_p1_reg_pc__vs 395 #define A__NAME_PC__vc arm_instr_load_w1_word_u1_p1_reg_pc__vc 396 #define A__NAME_PC__hi arm_instr_load_w1_word_u1_p1_reg_pc__hi 397 #define A__NAME_PC__ls arm_instr_load_w1_word_u1_p1_reg_pc__ls 398 #define A__NAME_PC__ge arm_instr_load_w1_word_u1_p1_reg_pc__ge 399 #define A__NAME_PC__lt arm_instr_load_w1_word_u1_p1_reg_pc__lt 400 #define A__NAME_PC__gt arm_instr_load_w1_word_u1_p1_reg_pc__gt 401 #define A__NAME_PC__le arm_instr_load_w1_word_u1_p1_reg_pc__le 427 #undef A__NAME_PC__eq 428 #undef A__NAME_PC__ne 429 #undef A__NAME_PC__cs 430 #undef A__NAME_PC__cc 431 #undef A__NAME_PC__mi 432 #undef A__NAME_PC__pl 433 #undef A__NAME_PC__vs 434 #undef A__NAME_PC__vc 435 #undef A__NAME_PC__hi 436 #undef A__NAME_PC__ls 437 #undef A__NAME_PC__ge 438 #undef A__NAME_PC__lt 439 #undef A__NAME_PC__gt 440 #undef A__NAME_PC__le 441 #undef A__NAME__general 444 #define A__NAME__general arm_instr_store_w1_byte_u1_p1_reg__general 445 #define A__NAME arm_instr_store_w1_byte_u1_p1_reg 446 #define A__NAME__eq arm_instr_store_w1_byte_u1_p1_reg__eq 447 #define A__NAME__ne arm_instr_store_w1_byte_u1_p1_reg__ne 448 #define A__NAME__cs arm_instr_store_w1_byte_u1_p1_reg__cs 449 #define A__NAME__cc arm_instr_store_w1_byte_u1_p1_reg__cc 450 #define A__NAME__mi arm_instr_store_w1_byte_u1_p1_reg__mi 451 #define A__NAME__pl arm_instr_store_w1_byte_u1_p1_reg__pl 452 #define A__NAME__vs arm_instr_store_w1_byte_u1_p1_reg__vs 453 #define A__NAME__vc arm_instr_store_w1_byte_u1_p1_reg__vc 454 #define A__NAME__hi arm_instr_store_w1_byte_u1_p1_reg__hi 455 #define A__NAME__ls arm_instr_store_w1_byte_u1_p1_reg__ls 456 #define A__NAME__ge arm_instr_store_w1_byte_u1_p1_reg__ge 457 #define A__NAME__lt arm_instr_store_w1_byte_u1_p1_reg__lt 458 #define A__NAME__gt arm_instr_store_w1_byte_u1_p1_reg__gt 459 #define A__NAME__le arm_instr_store_w1_byte_u1_p1_reg__le 460 #define A__NAME_PC arm_instr_store_w1_byte_u1_p1_reg_pc 461 #define A__NAME_PC__eq arm_instr_store_w1_byte_u1_p1_reg_pc__eq 462 #define A__NAME_PC__ne arm_instr_store_w1_byte_u1_p1_reg_pc__ne 463 #define A__NAME_PC__cs arm_instr_store_w1_byte_u1_p1_reg_pc__cs 464 #define A__NAME_PC__cc arm_instr_store_w1_byte_u1_p1_reg_pc__cc 465 #define A__NAME_PC__mi arm_instr_store_w1_byte_u1_p1_reg_pc__mi 466 #define A__NAME_PC__pl arm_instr_store_w1_byte_u1_p1_reg_pc__pl 467 #define A__NAME_PC__vs arm_instr_store_w1_byte_u1_p1_reg_pc__vs 468 #define A__NAME_PC__vc arm_instr_store_w1_byte_u1_p1_reg_pc__vc 469 #define A__NAME_PC__hi arm_instr_store_w1_byte_u1_p1_reg_pc__hi 470 #define A__NAME_PC__ls arm_instr_store_w1_byte_u1_p1_reg_pc__ls 471 #define A__NAME_PC__ge arm_instr_store_w1_byte_u1_p1_reg_pc__ge 472 #define A__NAME_PC__lt arm_instr_store_w1_byte_u1_p1_reg_pc__lt 473 #define A__NAME_PC__gt arm_instr_store_w1_byte_u1_p1_reg_pc__gt 474 #define A__NAME_PC__le arm_instr_store_w1_byte_u1_p1_reg_pc__le 500 #undef A__NAME_PC__eq 501 #undef A__NAME_PC__ne 502 #undef A__NAME_PC__cs 503 #undef A__NAME_PC__cc 504 #undef A__NAME_PC__mi 505 #undef A__NAME_PC__pl 506 #undef A__NAME_PC__vs 507 #undef A__NAME_PC__vc 508 #undef A__NAME_PC__hi 509 #undef A__NAME_PC__ls 510 #undef A__NAME_PC__ge 511 #undef A__NAME_PC__lt 512 #undef A__NAME_PC__gt 513 #undef A__NAME_PC__le 514 #undef A__NAME__general 517 #define A__NAME__general arm_instr_load_w1_byte_u1_p1_reg__general 518 #define A__NAME arm_instr_load_w1_byte_u1_p1_reg 519 #define A__NAME__eq arm_instr_load_w1_byte_u1_p1_reg__eq 520 #define A__NAME__ne arm_instr_load_w1_byte_u1_p1_reg__ne 521 #define A__NAME__cs arm_instr_load_w1_byte_u1_p1_reg__cs 522 #define A__NAME__cc arm_instr_load_w1_byte_u1_p1_reg__cc 523 #define A__NAME__mi arm_instr_load_w1_byte_u1_p1_reg__mi 524 #define A__NAME__pl arm_instr_load_w1_byte_u1_p1_reg__pl 525 #define A__NAME__vs arm_instr_load_w1_byte_u1_p1_reg__vs 526 #define A__NAME__vc arm_instr_load_w1_byte_u1_p1_reg__vc 527 #define A__NAME__hi arm_instr_load_w1_byte_u1_p1_reg__hi 528 #define A__NAME__ls arm_instr_load_w1_byte_u1_p1_reg__ls 529 #define A__NAME__ge arm_instr_load_w1_byte_u1_p1_reg__ge 530 #define A__NAME__lt arm_instr_load_w1_byte_u1_p1_reg__lt 531 #define A__NAME__gt arm_instr_load_w1_byte_u1_p1_reg__gt 532 #define A__NAME__le arm_instr_load_w1_byte_u1_p1_reg__le 533 #define A__NAME_PC arm_instr_load_w1_byte_u1_p1_reg_pc 534 #define A__NAME_PC__eq arm_instr_load_w1_byte_u1_p1_reg_pc__eq 535 #define A__NAME_PC__ne arm_instr_load_w1_byte_u1_p1_reg_pc__ne 536 #define A__NAME_PC__cs arm_instr_load_w1_byte_u1_p1_reg_pc__cs 537 #define A__NAME_PC__cc arm_instr_load_w1_byte_u1_p1_reg_pc__cc 538 #define A__NAME_PC__mi arm_instr_load_w1_byte_u1_p1_reg_pc__mi 539 #define A__NAME_PC__pl arm_instr_load_w1_byte_u1_p1_reg_pc__pl 540 #define A__NAME_PC__vs arm_instr_load_w1_byte_u1_p1_reg_pc__vs 541 #define A__NAME_PC__vc arm_instr_load_w1_byte_u1_p1_reg_pc__vc 542 #define A__NAME_PC__hi arm_instr_load_w1_byte_u1_p1_reg_pc__hi 543 #define A__NAME_PC__ls arm_instr_load_w1_byte_u1_p1_reg_pc__ls 544 #define A__NAME_PC__ge arm_instr_load_w1_byte_u1_p1_reg_pc__ge 545 #define A__NAME_PC__lt arm_instr_load_w1_byte_u1_p1_reg_pc__lt 546 #define A__NAME_PC__gt arm_instr_load_w1_byte_u1_p1_reg_pc__gt 547 #define A__NAME_PC__le arm_instr_load_w1_byte_u1_p1_reg_pc__le 575 #undef A__NAME_PC__eq 576 #undef A__NAME_PC__ne 577 #undef A__NAME_PC__cs 578 #undef A__NAME_PC__cc 579 #undef A__NAME_PC__mi 580 #undef A__NAME_PC__pl 581 #undef A__NAME_PC__vs 582 #undef A__NAME_PC__vc 583 #undef A__NAME_PC__hi 584 #undef A__NAME_PC__ls 585 #undef A__NAME_PC__ge 586 #undef A__NAME_PC__lt 587 #undef A__NAME_PC__gt 588 #undef A__NAME_PC__le 589 #undef A__NAME__general 592 #define A__NAME__general arm_instr_store_w1_signed_byte_u1_p1_imm__general 593 #define A__NAME arm_instr_store_w1_signed_byte_u1_p1_imm 594 #define A__NAME__eq arm_instr_store_w1_signed_byte_u1_p1_imm__eq 595 #define A__NAME__ne arm_instr_store_w1_signed_byte_u1_p1_imm__ne 596 #define A__NAME__cs arm_instr_store_w1_signed_byte_u1_p1_imm__cs 597 #define A__NAME__cc arm_instr_store_w1_signed_byte_u1_p1_imm__cc 598 #define A__NAME__mi arm_instr_store_w1_signed_byte_u1_p1_imm__mi 599 #define A__NAME__pl arm_instr_store_w1_signed_byte_u1_p1_imm__pl 600 #define A__NAME__vs arm_instr_store_w1_signed_byte_u1_p1_imm__vs 601 #define A__NAME__vc arm_instr_store_w1_signed_byte_u1_p1_imm__vc 602 #define A__NAME__hi arm_instr_store_w1_signed_byte_u1_p1_imm__hi 603 #define A__NAME__ls arm_instr_store_w1_signed_byte_u1_p1_imm__ls 604 #define A__NAME__ge arm_instr_store_w1_signed_byte_u1_p1_imm__ge 605 #define A__NAME__lt arm_instr_store_w1_signed_byte_u1_p1_imm__lt 606 #define A__NAME__gt arm_instr_store_w1_signed_byte_u1_p1_imm__gt 607 #define A__NAME__le arm_instr_store_w1_signed_byte_u1_p1_imm__le 608 #define A__NAME_PC arm_instr_store_w1_signed_byte_u1_p1_imm_pc 609 #define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u1_p1_imm_pc__eq 610 #define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ne 611 #define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cs 612 #define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cc 613 #define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u1_p1_imm_pc__mi 614 #define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u1_p1_imm_pc__pl 615 #define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vs 616 #define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vc 617 #define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u1_p1_imm_pc__hi 618 #define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ls 619 #define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ge 620 #define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u1_p1_imm_pc__lt 621 #define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u1_p1_imm_pc__gt 622 #define A__NAME_PC__le arm_instr_store_w1_signed_byte_u1_p1_imm_pc__le 648 #undef A__NAME_PC__eq 649 #undef A__NAME_PC__ne 650 #undef A__NAME_PC__cs 651 #undef A__NAME_PC__cc 652 #undef A__NAME_PC__mi 653 #undef A__NAME_PC__pl 654 #undef A__NAME_PC__vs 655 #undef A__NAME_PC__vc 656 #undef A__NAME_PC__hi 657 #undef A__NAME_PC__ls 658 #undef A__NAME_PC__ge 659 #undef A__NAME_PC__lt 660 #undef A__NAME_PC__gt 661 #undef A__NAME_PC__le 662 #undef A__NAME__general 665 #define A__NAME__general arm_instr_load_w1_signed_byte_u1_p1_imm__general 666 #define A__NAME arm_instr_load_w1_signed_byte_u1_p1_imm 667 #define A__NAME__eq arm_instr_load_w1_signed_byte_u1_p1_imm__eq 668 #define A__NAME__ne arm_instr_load_w1_signed_byte_u1_p1_imm__ne 669 #define A__NAME__cs arm_instr_load_w1_signed_byte_u1_p1_imm__cs 670 #define A__NAME__cc arm_instr_load_w1_signed_byte_u1_p1_imm__cc 671 #define A__NAME__mi arm_instr_load_w1_signed_byte_u1_p1_imm__mi 672 #define A__NAME__pl arm_instr_load_w1_signed_byte_u1_p1_imm__pl 673 #define A__NAME__vs arm_instr_load_w1_signed_byte_u1_p1_imm__vs 674 #define A__NAME__vc arm_instr_load_w1_signed_byte_u1_p1_imm__vc 675 #define A__NAME__hi arm_instr_load_w1_signed_byte_u1_p1_imm__hi 676 #define A__NAME__ls arm_instr_load_w1_signed_byte_u1_p1_imm__ls 677 #define A__NAME__ge arm_instr_load_w1_signed_byte_u1_p1_imm__ge 678 #define A__NAME__lt arm_instr_load_w1_signed_byte_u1_p1_imm__lt 679 #define A__NAME__gt arm_instr_load_w1_signed_byte_u1_p1_imm__gt 680 #define A__NAME__le arm_instr_load_w1_signed_byte_u1_p1_imm__le 681 #define A__NAME_PC arm_instr_load_w1_signed_byte_u1_p1_imm_pc 682 #define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u1_p1_imm_pc__eq 683 #define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ne 684 #define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cs 685 #define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cc 686 #define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u1_p1_imm_pc__mi 687 #define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u1_p1_imm_pc__pl 688 #define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vs 689 #define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vc 690 #define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u1_p1_imm_pc__hi 691 #define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ls 692 #define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ge 693 #define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u1_p1_imm_pc__lt 694 #define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u1_p1_imm_pc__gt 695 #define A__NAME_PC__le arm_instr_load_w1_signed_byte_u1_p1_imm_pc__le 723 #undef A__NAME_PC__eq 724 #undef A__NAME_PC__ne 725 #undef A__NAME_PC__cs 726 #undef A__NAME_PC__cc 727 #undef A__NAME_PC__mi 728 #undef A__NAME_PC__pl 729 #undef A__NAME_PC__vs 730 #undef A__NAME_PC__vc 731 #undef A__NAME_PC__hi 732 #undef A__NAME_PC__ls 733 #undef A__NAME_PC__ge 734 #undef A__NAME_PC__lt 735 #undef A__NAME_PC__gt 736 #undef A__NAME_PC__le 737 #undef A__NAME__general 740 #define A__NAME__general arm_instr_store_w1_unsigned_halfword_u1_p1_imm__general 741 #define A__NAME arm_instr_store_w1_unsigned_halfword_u1_p1_imm 742 #define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u1_p1_imm__eq 743 #define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ne 744 #define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cs 745 #define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cc 746 #define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u1_p1_imm__mi 747 #define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u1_p1_imm__pl 748 #define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vs 749 #define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vc 750 #define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u1_p1_imm__hi 751 #define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ls 752 #define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ge 753 #define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u1_p1_imm__lt 754 #define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u1_p1_imm__gt 755 #define A__NAME__le arm_instr_store_w1_unsigned_halfword_u1_p1_imm__le 756 #define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc 757 #define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__eq 758 #define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ne 759 #define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cs 760 #define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cc 761 #define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__mi 762 #define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__pl 763 #define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vs 764 #define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vc 765 #define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__hi 766 #define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ls 767 #define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ge 768 #define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__lt 769 #define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__gt 770 #define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__le 794 #undef A__NAME_PC__eq 795 #undef A__NAME_PC__ne 796 #undef A__NAME_PC__cs 797 #undef A__NAME_PC__cc 798 #undef A__NAME_PC__mi 799 #undef A__NAME_PC__pl 800 #undef A__NAME_PC__vs 801 #undef A__NAME_PC__vc 802 #undef A__NAME_PC__hi 803 #undef A__NAME_PC__ls 804 #undef A__NAME_PC__ge 805 #undef A__NAME_PC__lt 806 #undef A__NAME_PC__gt 807 #undef A__NAME_PC__le 808 #undef A__NAME__general 811 #define A__NAME__general arm_instr_load_w1_unsigned_halfword_u1_p1_imm__general 812 #define A__NAME arm_instr_load_w1_unsigned_halfword_u1_p1_imm 813 #define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u1_p1_imm__eq 814 #define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ne 815 #define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cs 816 #define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cc 817 #define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u1_p1_imm__mi 818 #define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u1_p1_imm__pl 819 #define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vs 820 #define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vc 821 #define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u1_p1_imm__hi 822 #define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ls 823 #define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ge 824 #define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u1_p1_imm__lt 825 #define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u1_p1_imm__gt 826 #define A__NAME__le arm_instr_load_w1_unsigned_halfword_u1_p1_imm__le 827 #define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc 828 #define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__eq 829 #define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ne 830 #define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cs 831 #define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cc 832 #define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__mi 833 #define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__pl 834 #define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vs 835 #define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vc 836 #define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__hi 837 #define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ls 838 #define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ge 839 #define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__lt 840 #define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__gt 841 #define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__le 867 #undef A__NAME_PC__eq 868 #undef A__NAME_PC__ne 869 #undef A__NAME_PC__cs 870 #undef A__NAME_PC__cc 871 #undef A__NAME_PC__mi 872 #undef A__NAME_PC__pl 873 #undef A__NAME_PC__vs 874 #undef A__NAME_PC__vc 875 #undef A__NAME_PC__hi 876 #undef A__NAME_PC__ls 877 #undef A__NAME_PC__ge 878 #undef A__NAME_PC__lt 879 #undef A__NAME_PC__gt 880 #undef A__NAME_PC__le 881 #undef A__NAME__general 884 #define A__NAME__general arm_instr_store_w1_signed_halfword_u1_p1_imm__general 885 #define A__NAME arm_instr_store_w1_signed_halfword_u1_p1_imm 886 #define A__NAME__eq arm_instr_store_w1_signed_halfword_u1_p1_imm__eq 887 #define A__NAME__ne arm_instr_store_w1_signed_halfword_u1_p1_imm__ne 888 #define A__NAME__cs arm_instr_store_w1_signed_halfword_u1_p1_imm__cs 889 #define A__NAME__cc arm_instr_store_w1_signed_halfword_u1_p1_imm__cc 890 #define A__NAME__mi arm_instr_store_w1_signed_halfword_u1_p1_imm__mi 891 #define A__NAME__pl arm_instr_store_w1_signed_halfword_u1_p1_imm__pl 892 #define A__NAME__vs arm_instr_store_w1_signed_halfword_u1_p1_imm__vs 893 #define A__NAME__vc arm_instr_store_w1_signed_halfword_u1_p1_imm__vc 894 #define A__NAME__hi arm_instr_store_w1_signed_halfword_u1_p1_imm__hi 895 #define A__NAME__ls arm_instr_store_w1_signed_halfword_u1_p1_imm__ls 896 #define A__NAME__ge arm_instr_store_w1_signed_halfword_u1_p1_imm__ge 897 #define A__NAME__lt arm_instr_store_w1_signed_halfword_u1_p1_imm__lt 898 #define A__NAME__gt arm_instr_store_w1_signed_halfword_u1_p1_imm__gt 899 #define A__NAME__le arm_instr_store_w1_signed_halfword_u1_p1_imm__le 900 #define A__NAME_PC arm_instr_store_w1_signed_halfword_u1_p1_imm_pc 901 #define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__eq 902 #define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ne 903 #define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cs 904 #define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cc 905 #define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__mi 906 #define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__pl 907 #define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vs 908 #define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vc 909 #define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__hi 910 #define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ls 911 #define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ge 912 #define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__lt 913 #define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__gt 914 #define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__le 940 #undef A__NAME_PC__eq 941 #undef A__NAME_PC__ne 942 #undef A__NAME_PC__cs 943 #undef A__NAME_PC__cc 944 #undef A__NAME_PC__mi 945 #undef A__NAME_PC__pl 946 #undef A__NAME_PC__vs 947 #undef A__NAME_PC__vc 948 #undef A__NAME_PC__hi 949 #undef A__NAME_PC__ls 950 #undef A__NAME_PC__ge 951 #undef A__NAME_PC__lt 952 #undef A__NAME_PC__gt 953 #undef A__NAME_PC__le 954 #undef A__NAME__general 957 #define A__NAME__general arm_instr_load_w1_signed_halfword_u1_p1_imm__general 958 #define A__NAME arm_instr_load_w1_signed_halfword_u1_p1_imm 959 #define A__NAME__eq arm_instr_load_w1_signed_halfword_u1_p1_imm__eq 960 #define A__NAME__ne arm_instr_load_w1_signed_halfword_u1_p1_imm__ne 961 #define A__NAME__cs arm_instr_load_w1_signed_halfword_u1_p1_imm__cs 962 #define A__NAME__cc arm_instr_load_w1_signed_halfword_u1_p1_imm__cc 963 #define A__NAME__mi arm_instr_load_w1_signed_halfword_u1_p1_imm__mi 964 #define A__NAME__pl arm_instr_load_w1_signed_halfword_u1_p1_imm__pl 965 #define A__NAME__vs arm_instr_load_w1_signed_halfword_u1_p1_imm__vs 966 #define A__NAME__vc arm_instr_load_w1_signed_halfword_u1_p1_imm__vc 967 #define A__NAME__hi arm_instr_load_w1_signed_halfword_u1_p1_imm__hi 968 #define A__NAME__ls arm_instr_load_w1_signed_halfword_u1_p1_imm__ls 969 #define A__NAME__ge arm_instr_load_w1_signed_halfword_u1_p1_imm__ge 970 #define A__NAME__lt arm_instr_load_w1_signed_halfword_u1_p1_imm__lt 971 #define A__NAME__gt arm_instr_load_w1_signed_halfword_u1_p1_imm__gt 972 #define A__NAME__le arm_instr_load_w1_signed_halfword_u1_p1_imm__le 973 #define A__NAME_PC arm_instr_load_w1_signed_halfword_u1_p1_imm_pc 974 #define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__eq 975 #define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ne 976 #define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cs 977 #define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cc 978 #define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__mi 979 #define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__pl 980 #define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vs 981 #define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vc 982 #define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__hi 983 #define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ls 984 #define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ge 985 #define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__lt 986 #define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__gt 987 #define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__le 1015 #undef A__NAME_PC__eq 1016 #undef A__NAME_PC__ne 1017 #undef A__NAME_PC__cs 1018 #undef A__NAME_PC__cc 1019 #undef A__NAME_PC__mi 1020 #undef A__NAME_PC__pl 1021 #undef A__NAME_PC__vs 1022 #undef A__NAME_PC__vc 1023 #undef A__NAME_PC__hi 1024 #undef A__NAME_PC__ls 1025 #undef A__NAME_PC__ge 1026 #undef A__NAME_PC__lt 1027 #undef A__NAME_PC__gt 1028 #undef A__NAME_PC__le 1029 #undef A__NAME__general 1032 #define A__NAME__general arm_instr_store_w1_signed_byte_u1_p1_reg__general 1033 #define A__NAME arm_instr_store_w1_signed_byte_u1_p1_reg 1034 #define A__NAME__eq arm_instr_store_w1_signed_byte_u1_p1_reg__eq 1035 #define A__NAME__ne arm_instr_store_w1_signed_byte_u1_p1_reg__ne 1036 #define A__NAME__cs arm_instr_store_w1_signed_byte_u1_p1_reg__cs 1037 #define A__NAME__cc arm_instr_store_w1_signed_byte_u1_p1_reg__cc 1038 #define A__NAME__mi arm_instr_store_w1_signed_byte_u1_p1_reg__mi 1039 #define A__NAME__pl arm_instr_store_w1_signed_byte_u1_p1_reg__pl 1040 #define A__NAME__vs arm_instr_store_w1_signed_byte_u1_p1_reg__vs 1041 #define A__NAME__vc arm_instr_store_w1_signed_byte_u1_p1_reg__vc 1042 #define A__NAME__hi arm_instr_store_w1_signed_byte_u1_p1_reg__hi 1043 #define A__NAME__ls arm_instr_store_w1_signed_byte_u1_p1_reg__ls 1044 #define A__NAME__ge arm_instr_store_w1_signed_byte_u1_p1_reg__ge 1045 #define A__NAME__lt arm_instr_store_w1_signed_byte_u1_p1_reg__lt 1046 #define A__NAME__gt arm_instr_store_w1_signed_byte_u1_p1_reg__gt 1047 #define A__NAME__le arm_instr_store_w1_signed_byte_u1_p1_reg__le 1048 #define A__NAME_PC arm_instr_store_w1_signed_byte_u1_p1_reg_pc 1049 #define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u1_p1_reg_pc__eq 1050 #define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ne 1051 #define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cs 1052 #define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cc 1053 #define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u1_p1_reg_pc__mi 1054 #define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u1_p1_reg_pc__pl 1055 #define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vs 1056 #define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vc 1057 #define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u1_p1_reg_pc__hi 1058 #define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ls 1059 #define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ge 1060 #define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u1_p1_reg_pc__lt 1061 #define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u1_p1_reg_pc__gt 1062 #define A__NAME_PC__le arm_instr_store_w1_signed_byte_u1_p1_reg_pc__le 1090 #undef A__NAME_PC__eq 1091 #undef A__NAME_PC__ne 1092 #undef A__NAME_PC__cs 1093 #undef A__NAME_PC__cc 1094 #undef A__NAME_PC__mi 1095 #undef A__NAME_PC__pl 1096 #undef A__NAME_PC__vs 1097 #undef A__NAME_PC__vc 1098 #undef A__NAME_PC__hi 1099 #undef A__NAME_PC__ls 1100 #undef A__NAME_PC__ge 1101 #undef A__NAME_PC__lt 1102 #undef A__NAME_PC__gt 1103 #undef A__NAME_PC__le 1104 #undef A__NAME__general 1107 #define A__NAME__general arm_instr_load_w1_signed_byte_u1_p1_reg__general 1108 #define A__NAME arm_instr_load_w1_signed_byte_u1_p1_reg 1109 #define A__NAME__eq arm_instr_load_w1_signed_byte_u1_p1_reg__eq 1110 #define A__NAME__ne arm_instr_load_w1_signed_byte_u1_p1_reg__ne 1111 #define A__NAME__cs arm_instr_load_w1_signed_byte_u1_p1_reg__cs 1112 #define A__NAME__cc arm_instr_load_w1_signed_byte_u1_p1_reg__cc 1113 #define A__NAME__mi arm_instr_load_w1_signed_byte_u1_p1_reg__mi 1114 #define A__NAME__pl arm_instr_load_w1_signed_byte_u1_p1_reg__pl 1115 #define A__NAME__vs arm_instr_load_w1_signed_byte_u1_p1_reg__vs 1116 #define A__NAME__vc arm_instr_load_w1_signed_byte_u1_p1_reg__vc 1117 #define A__NAME__hi arm_instr_load_w1_signed_byte_u1_p1_reg__hi 1118 #define A__NAME__ls arm_instr_load_w1_signed_byte_u1_p1_reg__ls 1119 #define A__NAME__ge arm_instr_load_w1_signed_byte_u1_p1_reg__ge 1120 #define A__NAME__lt arm_instr_load_w1_signed_byte_u1_p1_reg__lt 1121 #define A__NAME__gt arm_instr_load_w1_signed_byte_u1_p1_reg__gt 1122 #define A__NAME__le arm_instr_load_w1_signed_byte_u1_p1_reg__le 1123 #define A__NAME_PC arm_instr_load_w1_signed_byte_u1_p1_reg_pc 1124 #define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u1_p1_reg_pc__eq 1125 #define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ne 1126 #define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cs 1127 #define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cc 1128 #define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u1_p1_reg_pc__mi 1129 #define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u1_p1_reg_pc__pl 1130 #define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vs 1131 #define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vc 1132 #define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u1_p1_reg_pc__hi 1133 #define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ls 1134 #define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ge 1135 #define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u1_p1_reg_pc__lt 1136 #define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u1_p1_reg_pc__gt 1137 #define A__NAME_PC__le arm_instr_load_w1_signed_byte_u1_p1_reg_pc__le 1167 #undef A__NAME_PC__eq 1168 #undef A__NAME_PC__ne 1169 #undef A__NAME_PC__cs 1170 #undef A__NAME_PC__cc 1171 #undef A__NAME_PC__mi 1172 #undef A__NAME_PC__pl 1173 #undef A__NAME_PC__vs 1174 #undef A__NAME_PC__vc 1175 #undef A__NAME_PC__hi 1176 #undef A__NAME_PC__ls 1177 #undef A__NAME_PC__ge 1178 #undef A__NAME_PC__lt 1179 #undef A__NAME_PC__gt 1180 #undef A__NAME_PC__le 1181 #undef A__NAME__general 1184 #define A__NAME__general arm_instr_store_w1_unsigned_halfword_u1_p1_reg__general 1185 #define A__NAME arm_instr_store_w1_unsigned_halfword_u1_p1_reg 1186 #define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u1_p1_reg__eq 1187 #define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ne 1188 #define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cs 1189 #define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cc 1190 #define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u1_p1_reg__mi 1191 #define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u1_p1_reg__pl 1192 #define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vs 1193 #define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vc 1194 #define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u1_p1_reg__hi 1195 #define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ls 1196 #define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ge 1197 #define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u1_p1_reg__lt 1198 #define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u1_p1_reg__gt 1199 #define A__NAME__le arm_instr_store_w1_unsigned_halfword_u1_p1_reg__le 1200 #define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc 1201 #define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__eq 1202 #define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ne 1203 #define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cs 1204 #define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cc 1205 #define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__mi 1206 #define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__pl 1207 #define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vs 1208 #define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vc 1209 #define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__hi 1210 #define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ls 1211 #define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ge 1212 #define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__lt 1213 #define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__gt 1214 #define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__le 1240 #undef A__NAME_PC__eq 1241 #undef A__NAME_PC__ne 1242 #undef A__NAME_PC__cs 1243 #undef A__NAME_PC__cc 1244 #undef A__NAME_PC__mi 1245 #undef A__NAME_PC__pl 1246 #undef A__NAME_PC__vs 1247 #undef A__NAME_PC__vc 1248 #undef A__NAME_PC__hi 1249 #undef A__NAME_PC__ls 1250 #undef A__NAME_PC__ge 1251 #undef A__NAME_PC__lt 1252 #undef A__NAME_PC__gt 1253 #undef A__NAME_PC__le 1254 #undef A__NAME__general 1257 #define A__NAME__general arm_instr_load_w1_unsigned_halfword_u1_p1_reg__general 1258 #define A__NAME arm_instr_load_w1_unsigned_halfword_u1_p1_reg 1259 #define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u1_p1_reg__eq 1260 #define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ne 1261 #define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cs 1262 #define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cc 1263 #define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u1_p1_reg__mi 1264 #define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u1_p1_reg__pl 1265 #define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vs 1266 #define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vc 1267 #define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u1_p1_reg__hi 1268 #define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ls 1269 #define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ge 1270 #define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u1_p1_reg__lt 1271 #define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u1_p1_reg__gt 1272 #define A__NAME__le arm_instr_load_w1_unsigned_halfword_u1_p1_reg__le 1273 #define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc 1274 #define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__eq 1275 #define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ne 1276 #define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cs 1277 #define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cc 1278 #define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__mi 1279 #define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__pl 1280 #define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vs 1281 #define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vc 1282 #define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__hi 1283 #define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ls 1284 #define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ge 1285 #define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__lt 1286 #define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__gt 1287 #define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__le 1315 #undef A__NAME_PC__eq 1316 #undef A__NAME_PC__ne 1317 #undef A__NAME_PC__cs 1318 #undef A__NAME_PC__cc 1319 #undef A__NAME_PC__mi 1320 #undef A__NAME_PC__pl 1321 #undef A__NAME_PC__vs 1322 #undef A__NAME_PC__vc 1323 #undef A__NAME_PC__hi 1324 #undef A__NAME_PC__ls 1325 #undef A__NAME_PC__ge 1326 #undef A__NAME_PC__lt 1327 #undef A__NAME_PC__gt 1328 #undef A__NAME_PC__le 1329 #undef A__NAME__general 1332 #define A__NAME__general arm_instr_store_w1_signed_halfword_u1_p1_reg__general 1333 #define A__NAME arm_instr_store_w1_signed_halfword_u1_p1_reg 1334 #define A__NAME__eq arm_instr_store_w1_signed_halfword_u1_p1_reg__eq 1335 #define A__NAME__ne arm_instr_store_w1_signed_halfword_u1_p1_reg__ne 1336 #define A__NAME__cs arm_instr_store_w1_signed_halfword_u1_p1_reg__cs 1337 #define A__NAME__cc arm_instr_store_w1_signed_halfword_u1_p1_reg__cc 1338 #define A__NAME__mi arm_instr_store_w1_signed_halfword_u1_p1_reg__mi 1339 #define A__NAME__pl arm_instr_store_w1_signed_halfword_u1_p1_reg__pl 1340 #define A__NAME__vs arm_instr_store_w1_signed_halfword_u1_p1_reg__vs 1341 #define A__NAME__vc arm_instr_store_w1_signed_halfword_u1_p1_reg__vc 1342 #define A__NAME__hi arm_instr_store_w1_signed_halfword_u1_p1_reg__hi 1343 #define A__NAME__ls arm_instr_store_w1_signed_halfword_u1_p1_reg__ls 1344 #define A__NAME__ge arm_instr_store_w1_signed_halfword_u1_p1_reg__ge 1345 #define A__NAME__lt arm_instr_store_w1_signed_halfword_u1_p1_reg__lt 1346 #define A__NAME__gt arm_instr_store_w1_signed_halfword_u1_p1_reg__gt 1347 #define A__NAME__le arm_instr_store_w1_signed_halfword_u1_p1_reg__le 1348 #define A__NAME_PC arm_instr_store_w1_signed_halfword_u1_p1_reg_pc 1349 #define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__eq 1350 #define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ne 1351 #define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cs 1352 #define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cc 1353 #define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__mi 1354 #define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__pl 1355 #define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vs 1356 #define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vc 1357 #define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__hi 1358 #define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ls 1359 #define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ge 1360 #define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__lt 1361 #define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__gt 1362 #define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__le 1390 #undef A__NAME_PC__eq 1391 #undef A__NAME_PC__ne 1392 #undef A__NAME_PC__cs 1393 #undef A__NAME_PC__cc 1394 #undef A__NAME_PC__mi 1395 #undef A__NAME_PC__pl 1396 #undef A__NAME_PC__vs 1397 #undef A__NAME_PC__vc 1398 #undef A__NAME_PC__hi 1399 #undef A__NAME_PC__ls 1400 #undef A__NAME_PC__ge 1401 #undef A__NAME_PC__lt 1402 #undef A__NAME_PC__gt 1403 #undef A__NAME_PC__le 1404 #undef A__NAME__general 1407 #define A__NAME__general arm_instr_load_w1_signed_halfword_u1_p1_reg__general 1408 #define A__NAME arm_instr_load_w1_signed_halfword_u1_p1_reg 1409 #define A__NAME__eq arm_instr_load_w1_signed_halfword_u1_p1_reg__eq 1410 #define A__NAME__ne arm_instr_load_w1_signed_halfword_u1_p1_reg__ne 1411 #define A__NAME__cs arm_instr_load_w1_signed_halfword_u1_p1_reg__cs 1412 #define A__NAME__cc arm_instr_load_w1_signed_halfword_u1_p1_reg__cc 1413 #define A__NAME__mi arm_instr_load_w1_signed_halfword_u1_p1_reg__mi 1414 #define A__NAME__pl arm_instr_load_w1_signed_halfword_u1_p1_reg__pl 1415 #define A__NAME__vs arm_instr_load_w1_signed_halfword_u1_p1_reg__vs 1416 #define A__NAME__vc arm_instr_load_w1_signed_halfword_u1_p1_reg__vc 1417 #define A__NAME__hi arm_instr_load_w1_signed_halfword_u1_p1_reg__hi 1418 #define A__NAME__ls arm_instr_load_w1_signed_halfword_u1_p1_reg__ls 1419 #define A__NAME__ge arm_instr_load_w1_signed_halfword_u1_p1_reg__ge 1420 #define A__NAME__lt arm_instr_load_w1_signed_halfword_u1_p1_reg__lt 1421 #define A__NAME__gt arm_instr_load_w1_signed_halfword_u1_p1_reg__gt 1422 #define A__NAME__le arm_instr_load_w1_signed_halfword_u1_p1_reg__le 1423 #define A__NAME_PC arm_instr_load_w1_signed_halfword_u1_p1_reg_pc 1424 #define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__eq 1425 #define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ne 1426 #define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cs 1427 #define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cc 1428 #define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__mi 1429 #define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__pl 1430 #define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vs 1431 #define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vc 1432 #define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__hi 1433 #define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ls 1434 #define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ge 1435 #define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__lt 1436 #define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__gt 1437 #define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__le 1467 #undef A__NAME_PC__eq 1468 #undef A__NAME_PC__ne 1469 #undef A__NAME_PC__cs 1470 #undef A__NAME_PC__cc 1471 #undef A__NAME_PC__mi 1472 #undef A__NAME_PC__pl 1473 #undef A__NAME_PC__vs 1474 #undef A__NAME_PC__vc 1475 #undef A__NAME_PC__hi 1476 #undef A__NAME_PC__ls 1477 #undef A__NAME_PC__ge 1478 #undef A__NAME_PC__lt 1479 #undef A__NAME_PC__gt 1480 #undef A__NAME_PC__le 1481 #undef A__NAME__general
void arm_pc_to_pointers(struct cpu *)
void arm_instr_invalid(struct cpu *, struct arm_instr_call *)
void arm_instr_nop(struct cpu *, struct arm_instr_call *)