sh4_mmu.h File Reference

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Macros
sh4_mmu.h File Reference

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Macros

#define SH4_PTEH   0xff000000
 
#define SH4_PTEH_VPN_MASK   0xfffffc00
 
#define SH4_PTEH_ASID_MASK   0x000000ff
 
#define SH4_PTEL   0xff000004
 
#define SH4_PTEL_WT   0x00000001
 
#define SH4_PTEL_SH   0x00000002
 
#define SH4_PTEL_D   0x00000004
 
#define SH4_PTEL_C   0x00000008
 
#define SH4_PTEL_PR_SHIFT   5
 
#define SH4_PTEL_PR_MASK   0x00000060 /* [5:6] */
 
#define SH4_PTEL_SZ_MASK   0x00000090 /* [4][7] */
 
#define SH4_PTEL_SZ_1K   0x00000000
 
#define SH4_PTEL_SZ_4K   0x00000010
 
#define SH4_PTEL_SZ_64K   0x00000080
 
#define SH4_PTEL_SZ_1M   0x00000090
 
#define SH4_PTEL_V   0x00000100
 
#define SH4_PTEL_HWBITS   0x1ffff1ff /* [28:12]PFN [8:0]attr. */
 
#define SH4_PTEA   0xff000034
 
#define SH4_PTEA_SA_MASK   0x00000007
 
#define SH4_PTEA_SA_TC   0x00000008
 
#define SH4_TTB   0xff000008
 
#define SH4_TEA   0xff00000c
 
#define SH4_MMUCR   0xff000010
 
#define SH4_MMUCR_AT   0x00000001
 
#define SH4_MMUCR_TI   0x00000004
 
#define SH4_MMUCR_SV   0x00000100
 
#define SH4_MMUCR_SQMD   0x00000200
 
#define SH4_MMUCR_URC_SHIFT   10
 
#define SH4_MMUCR_URC_MASK   0x0000fc00 /* [10:15] */
 
#define SH4_MMUCR_URB_SHIFT   18
 
#define SH4_MMUCR_URB_MASK   0x00fc0000 /* [18:23] */
 
#define SH4_MMUCR_LRUI_SHIFT   26
 
#define SH4_MMUCR_LRUT_MASK   0xfc000000 /* [26:31] */
 
#define SH4_MMUCR_MASK
 
#define SH4_ITLB_ENTRY   4
 
#define SH4_UTLB_ENTRY   64
 
#define SH4_ITLB_AA   0xf2000000
 
#define SH4_ITLB_E_SHIFT   8
 
#define SH4_ITLB_E_MASK   0x00000300 /* [9:8] */
 
#define SH4_ITLB_AA_ASID_MASK   0x000000ff /* [7:0] */
 
#define SH4_ITLB_AA_V   0x00000100
 
#define SH4_ITLB_AA_VPN_SHIFT   10
 
#define SH4_ITLB_AA_VPN_MASK   0xfffffc00 /* [31:10] */
 
#define SH4_ITLB_DA1   0xf3000000
 
#define SH4_ITLB_DA1_SH   0x00000002
 
#define SH4_ITLB_DA1_C   0x00000008
 
#define SH4_ITLB_DA1_SZ_MASK   0x00000090 /* [7][4] */
 
#define SH4_ITLB_DA1_SZ_1K   0x00000000
 
#define SH4_ITLB_DA1_SZ_4K   0x00000010
 
#define SH4_ITLB_DA1_SZ_64K   0x00000080
 
#define SH4_ITLB_DA1_SZ_1M   0x00000090
 
#define SH4_ITLB_DA1_PR   0x00000040
 
#define SH4_ITLB_DA1_V   0x00000100
 
#define SH4_ITLB_DA1_PPN_SHIFT   11
 
#define SH4_ITLB_DA1_PPN_MASK   0x1ffffc00 /* [28:10] */
 
#define SH4_ITLB_DA2   0xf3800000
 
#define SH4_ITLB_DA2_SA_MASK   0x00000003
 
#define SH4_ITLB_DA2_TC   0x00000004
 
#define SH4_UTLB_AA   0xf6000000
 
#define SH4_UTLB_E_SHIFT   8
 
#define SH4_UTLB_E_MASK   0x00003f00
 
#define SH4_UTLB_A   0x00000080
 
#define SH4_UTLB_AA_VPN_MASK   0xfffffc00 /* [31:10] */
 
#define SH4_UTLB_AA_D   0x00000200
 
#define SH4_UTLB_AA_V   0x00000100
 
#define SH4_UTLB_AA_ASID_MASK   0x000000ff /* [7:0] */
 
#define SH4_UTLB_DA1   0xf7000000
 
#define SH4_UTLB_DA1_WT   0x00000001
 
#define SH4_UTLB_DA1_SH   0x00000002
 
#define SH4_UTLB_DA1_D   0x00000004
 
#define SH4_UTLB_DA1_C   0x00000008
 
#define SH4_UTLB_DA1_SZ_MASK   0x00000090 /* [7][4] */
 
#define SH4_UTLB_DA1_SZ_1K   0x00000000
 
#define SH4_UTLB_DA1_SZ_4K   0x00000010
 
#define SH4_UTLB_DA1_SZ_64K   0x00000080
 
#define SH4_UTLB_DA1_SZ_1M   0x00000090
 
#define SH4_UTLB_DA1_PR_SHIFT   5
 
#define SH4_UTLB_DA1_PR_MASK   0x00000060
 
#define SH4_UTLB_DA1_V   0x00000100
 
#define SH4_UTLB_DA1_PPN_SHIFT   11
 
#define SH4_UTLB_DA1_PPN_MASK   0x1ffffc00 /* [28:10] */
 
#define SH4_UTLB_DA2   0xf7800000
 
#define SH4_UTLB_DA2_SA_MASK   0x00000003
 
#define SH4_UTLB_DA2_TC   0x00000004
 
#define SH4_TLB_DISABLE   *(volatile uint32_t *)SH4_MMUCR = SH4_MMUCR_TI
 

Macro Definition Documentation

◆ SH4_ITLB_AA

#define SH4_ITLB_AA   0xf2000000

Definition at line 92 of file sh4_mmu.h.

Referenced by DEVINIT().

◆ SH4_ITLB_AA_ASID_MASK

#define SH4_ITLB_AA_ASID_MASK   0x000000ff /* [7:0] */

Definition at line 98 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_ITLB_AA_V

#define SH4_ITLB_AA_V   0x00000100

Definition at line 99 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_ITLB_AA_VPN_MASK

#define SH4_ITLB_AA_VPN_MASK   0xfffffc00 /* [31:10] */

Definition at line 101 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_ITLB_AA_VPN_SHIFT

#define SH4_ITLB_AA_VPN_SHIFT   10

Definition at line 100 of file sh4_mmu.h.

◆ SH4_ITLB_DA1

#define SH4_ITLB_DA1   0xf3000000

Definition at line 103 of file sh4_mmu.h.

Referenced by DEVINIT().

◆ SH4_ITLB_DA1_C

#define SH4_ITLB_DA1_C   0x00000008

Definition at line 105 of file sh4_mmu.h.

◆ SH4_ITLB_DA1_PPN_MASK

#define SH4_ITLB_DA1_PPN_MASK   0x1ffffc00 /* [28:10] */

Definition at line 114 of file sh4_mmu.h.

◆ SH4_ITLB_DA1_PPN_SHIFT

#define SH4_ITLB_DA1_PPN_SHIFT   11

Definition at line 113 of file sh4_mmu.h.

◆ SH4_ITLB_DA1_PR

#define SH4_ITLB_DA1_PR   0x00000040

Definition at line 111 of file sh4_mmu.h.

◆ SH4_ITLB_DA1_SH

#define SH4_ITLB_DA1_SH   0x00000002

Definition at line 104 of file sh4_mmu.h.

◆ SH4_ITLB_DA1_SZ_1K

#define SH4_ITLB_DA1_SZ_1K   0x00000000

Definition at line 107 of file sh4_mmu.h.

◆ SH4_ITLB_DA1_SZ_1M

#define SH4_ITLB_DA1_SZ_1M   0x00000090

Definition at line 110 of file sh4_mmu.h.

◆ SH4_ITLB_DA1_SZ_4K

#define SH4_ITLB_DA1_SZ_4K   0x00000010

Definition at line 108 of file sh4_mmu.h.

◆ SH4_ITLB_DA1_SZ_64K

#define SH4_ITLB_DA1_SZ_64K   0x00000080

Definition at line 109 of file sh4_mmu.h.

◆ SH4_ITLB_DA1_SZ_MASK

#define SH4_ITLB_DA1_SZ_MASK   0x00000090 /* [7][4] */

Definition at line 106 of file sh4_mmu.h.

◆ SH4_ITLB_DA1_V

#define SH4_ITLB_DA1_V   0x00000100

Definition at line 112 of file sh4_mmu.h.

◆ SH4_ITLB_DA2

#define SH4_ITLB_DA2   0xf3800000

Definition at line 116 of file sh4_mmu.h.

◆ SH4_ITLB_DA2_SA_MASK

#define SH4_ITLB_DA2_SA_MASK   0x00000003

Definition at line 117 of file sh4_mmu.h.

◆ SH4_ITLB_DA2_TC

#define SH4_ITLB_DA2_TC   0x00000004

Definition at line 118 of file sh4_mmu.h.

◆ SH4_ITLB_E_MASK

#define SH4_ITLB_E_MASK   0x00000300 /* [9:8] */

Definition at line 95 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_ITLB_E_SHIFT

#define SH4_ITLB_E_SHIFT   8

Definition at line 94 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_ITLB_ENTRY

#define SH4_ITLB_ENTRY   4

Definition at line 88 of file sh4_mmu.h.

◆ SH4_MMUCR

#define SH4_MMUCR   0xff000010

Definition at line 68 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_MMUCR_AT

#define SH4_MMUCR_AT   0x00000001

Definition at line 69 of file sh4_mmu.h.

Referenced by sh_translate_v2p(), and X().

◆ SH4_MMUCR_LRUI_SHIFT

#define SH4_MMUCR_LRUI_SHIFT   26

Definition at line 77 of file sh4_mmu.h.

◆ SH4_MMUCR_LRUT_MASK

#define SH4_MMUCR_LRUT_MASK   0xfc000000 /* [26:31] */

Definition at line 78 of file sh4_mmu.h.

◆ SH4_MMUCR_MASK

#define SH4_MMUCR_MASK
Value:
SH4_MMUCR_URC_MASK | SH4_MMUCR_SQMD | SH4_MMUCR_SV | SH4_MMUCR_AT)
#define SH4_MMUCR_URB_MASK
Definition: sh4_mmu.h:76
#define SH4_MMUCR_SQMD
Definition: sh4_mmu.h:72
#define SH4_MMUCR_AT
Definition: sh4_mmu.h:69
#define SH4_MMUCR_LRUT_MASK
Definition: sh4_mmu.h:78
#define SH4_MMUCR_SV
Definition: sh4_mmu.h:71

Definition at line 80 of file sh4_mmu.h.

◆ SH4_MMUCR_SQMD

#define SH4_MMUCR_SQMD   0x00000200

Definition at line 72 of file sh4_mmu.h.

Referenced by X().

◆ SH4_MMUCR_SV

#define SH4_MMUCR_SV   0x00000100

Definition at line 71 of file sh4_mmu.h.

◆ SH4_MMUCR_TI

#define SH4_MMUCR_TI   0x00000004

Definition at line 70 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_MMUCR_URB_MASK

#define SH4_MMUCR_URB_MASK   0x00fc0000 /* [18:23] */

Definition at line 76 of file sh4_mmu.h.

◆ SH4_MMUCR_URB_SHIFT

#define SH4_MMUCR_URB_SHIFT   18

Definition at line 75 of file sh4_mmu.h.

◆ SH4_MMUCR_URC_MASK

#define SH4_MMUCR_URC_MASK   0x0000fc00 /* [10:15] */

Definition at line 74 of file sh4_mmu.h.

Referenced by X().

◆ SH4_MMUCR_URC_SHIFT

#define SH4_MMUCR_URC_SHIFT   10

Definition at line 73 of file sh4_mmu.h.

Referenced by X().

◆ SH4_PTEA

#define SH4_PTEA   0xff000034

Definition at line 63 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_PTEA_SA_MASK

#define SH4_PTEA_SA_MASK   0x00000007

Definition at line 64 of file sh4_mmu.h.

◆ SH4_PTEA_SA_TC

#define SH4_PTEA_SA_TC   0x00000008

Definition at line 65 of file sh4_mmu.h.

◆ SH4_PTEH

#define SH4_PTEH   0xff000000

Definition at line 45 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_PTEH_ASID_MASK

#define SH4_PTEH_ASID_MASK   0x000000ff

Definition at line 47 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS(), and X().

◆ SH4_PTEH_VPN_MASK

#define SH4_PTEH_VPN_MASK   0xfffffc00

Definition at line 46 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS(), and sh_exception().

◆ SH4_PTEL

#define SH4_PTEL   0xff000004

Definition at line 48 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_PTEL_C

#define SH4_PTEL_C   0x00000008

Definition at line 52 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_PTEL_D

#define SH4_PTEL_D   0x00000004

Definition at line 51 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_PTEL_HWBITS

#define SH4_PTEL_HWBITS   0x1ffff1ff /* [28:12]PFN [8:0]attr. */

Definition at line 61 of file sh4_mmu.h.

◆ SH4_PTEL_PR_MASK

#define SH4_PTEL_PR_MASK   0x00000060 /* [5:6] */

Definition at line 54 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_PTEL_PR_SHIFT

#define SH4_PTEL_PR_SHIFT   5

Definition at line 53 of file sh4_mmu.h.

◆ SH4_PTEL_SH

#define SH4_PTEL_SH   0x00000002

Definition at line 50 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_PTEL_SZ_1K

#define SH4_PTEL_SZ_1K   0x00000000

Definition at line 56 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_PTEL_SZ_1M

#define SH4_PTEL_SZ_1M   0x00000090

Definition at line 59 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_PTEL_SZ_4K

#define SH4_PTEL_SZ_4K   0x00000010

Definition at line 57 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS(), and X().

◆ SH4_PTEL_SZ_64K

#define SH4_PTEL_SZ_64K   0x00000080

Definition at line 58 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_PTEL_SZ_MASK

#define SH4_PTEL_SZ_MASK   0x00000090 /* [4][7] */

Definition at line 55 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS(), and X().

◆ SH4_PTEL_V

#define SH4_PTEL_V   0x00000100

Definition at line 60 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_PTEL_WT

#define SH4_PTEL_WT   0x00000001

Definition at line 49 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_TEA

#define SH4_TEA   0xff00000c

Definition at line 67 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_TLB_DISABLE

#define SH4_TLB_DISABLE   *(volatile uint32_t *)SH4_MMUCR = SH4_MMUCR_TI

Definition at line 153 of file sh4_mmu.h.

◆ SH4_TTB

#define SH4_TTB   0xff000008

Definition at line 66 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_UTLB_A

#define SH4_UTLB_A   0x00000080

Definition at line 125 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_UTLB_AA

#define SH4_UTLB_AA   0xf6000000

Definition at line 121 of file sh4_mmu.h.

Referenced by DEVINIT().

◆ SH4_UTLB_AA_ASID_MASK

#define SH4_UTLB_AA_ASID_MASK   0x000000ff /* [7:0] */

Definition at line 131 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_UTLB_AA_D

#define SH4_UTLB_AA_D   0x00000200

Definition at line 129 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_UTLB_AA_V

#define SH4_UTLB_AA_V   0x00000100

Definition at line 130 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_UTLB_AA_VPN_MASK

#define SH4_UTLB_AA_VPN_MASK   0xfffffc00 /* [31:10] */

Definition at line 128 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_UTLB_DA1

#define SH4_UTLB_DA1   0xf7000000

Definition at line 133 of file sh4_mmu.h.

Referenced by DEVINIT().

◆ SH4_UTLB_DA1_C

#define SH4_UTLB_DA1_C   0x00000008

Definition at line 137 of file sh4_mmu.h.

◆ SH4_UTLB_DA1_D

#define SH4_UTLB_DA1_D   0x00000004

Definition at line 136 of file sh4_mmu.h.

◆ SH4_UTLB_DA1_PPN_MASK

#define SH4_UTLB_DA1_PPN_MASK   0x1ffffc00 /* [28:10] */

Definition at line 147 of file sh4_mmu.h.

◆ SH4_UTLB_DA1_PPN_SHIFT

#define SH4_UTLB_DA1_PPN_SHIFT   11

Definition at line 146 of file sh4_mmu.h.

◆ SH4_UTLB_DA1_PR_MASK

#define SH4_UTLB_DA1_PR_MASK   0x00000060

Definition at line 144 of file sh4_mmu.h.

◆ SH4_UTLB_DA1_PR_SHIFT

#define SH4_UTLB_DA1_PR_SHIFT   5

Definition at line 143 of file sh4_mmu.h.

◆ SH4_UTLB_DA1_SH

#define SH4_UTLB_DA1_SH   0x00000002

Definition at line 135 of file sh4_mmu.h.

◆ SH4_UTLB_DA1_SZ_1K

#define SH4_UTLB_DA1_SZ_1K   0x00000000

Definition at line 139 of file sh4_mmu.h.

◆ SH4_UTLB_DA1_SZ_1M

#define SH4_UTLB_DA1_SZ_1M   0x00000090

Definition at line 142 of file sh4_mmu.h.

◆ SH4_UTLB_DA1_SZ_4K

#define SH4_UTLB_DA1_SZ_4K   0x00000010

Definition at line 140 of file sh4_mmu.h.

◆ SH4_UTLB_DA1_SZ_64K

#define SH4_UTLB_DA1_SZ_64K   0x00000080

Definition at line 141 of file sh4_mmu.h.

◆ SH4_UTLB_DA1_SZ_MASK

#define SH4_UTLB_DA1_SZ_MASK   0x00000090 /* [7][4] */

Definition at line 138 of file sh4_mmu.h.

◆ SH4_UTLB_DA1_V

#define SH4_UTLB_DA1_V   0x00000100

Definition at line 145 of file sh4_mmu.h.

◆ SH4_UTLB_DA1_WT

#define SH4_UTLB_DA1_WT   0x00000001

Definition at line 134 of file sh4_mmu.h.

◆ SH4_UTLB_DA2

#define SH4_UTLB_DA2   0xf7800000

Definition at line 149 of file sh4_mmu.h.

◆ SH4_UTLB_DA2_SA_MASK

#define SH4_UTLB_DA2_SA_MASK   0x00000003

Definition at line 150 of file sh4_mmu.h.

◆ SH4_UTLB_DA2_TC

#define SH4_UTLB_DA2_TC   0x00000004

Definition at line 151 of file sh4_mmu.h.

◆ SH4_UTLB_E_MASK

#define SH4_UTLB_E_MASK   0x00003f00

Definition at line 124 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_UTLB_E_SHIFT

#define SH4_UTLB_E_SHIFT   8

Definition at line 123 of file sh4_mmu.h.

Referenced by DEVICE_ACCESS().

◆ SH4_UTLB_ENTRY

#define SH4_UTLB_ENTRY   64

Definition at line 89 of file sh4_mmu.h.


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