dev_rs5c313.cc Source File

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dev_rs5c313.cc
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1 /*
2  * Copyright (C) 2007-2009 Anders Gavare. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * 1. Redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution.
12  * 3. The name of the author may not be used to endorse or promote products
13  * derived from this software without specific prior written permission.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  *
28  * COMMENT: RICOH RS5C313 Real Time Clock
29  *
30  * The RS5C313 has 16 registers, see rs5c313reg.h for details. These registers
31  * are addressed at byte offsets.
32  *
33  * Note: The only use for this device so far is in the Landisk, connected to
34  * the SH4 SCI pins. In the Landisk machine, the RS5C313 is placed at
35  * a fake (high) address in memory.
36  */
37 
38 #include <stdio.h>
39 #include <stdlib.h>
40 #include <string.h>
41 #include <time.h>
42 
43 #include "cpu.h"
44 #include "device.h"
45 #include "machine.h"
46 #include "memory.h"
47 #include "misc.h"
48 
49 #include "thirdparty/rs5c313reg.h"
50 
51 
52 #define DEV_RS5C313_LENGTH 16
53 
54 struct rs5c313_data {
56 };
57 
58 
59 /*
60  * rs5c313_update_time():
61  *
62  * Set the RS5C313 registers to correspond to the host's clock.
63  */
64 static void rs5c313_update_time(struct rs5c313_data *d)
65 {
66  struct tm *tmp;
67  time_t timet;
68 
69  timet = time(NULL);
70  tmp = gmtime(&timet);
71 
72  d->reg[RS5C313_SEC1] = tmp->tm_sec % 10;
73  d->reg[RS5C313_SEC10] = tmp->tm_sec / 10;
74  d->reg[RS5C313_MIN1] = tmp->tm_min % 10;
75  d->reg[RS5C313_MIN10] = tmp->tm_min / 10;
76  d->reg[RS5C313_HOUR1] = tmp->tm_hour % 10;
77  d->reg[RS5C313_HOUR10] = tmp->tm_hour / 10;
78 
79  /* WDAY. Zero-based. TODO: Is this correct? */
80  d->reg[RS5C313_WDAY] = tmp->tm_wday;
81 
82  d->reg[RS5C313_DAY1] = tmp->tm_mday % 10;
83  d->reg[RS5C313_DAY10] = tmp->tm_mday / 10;
84  d->reg[RS5C313_MON1] = (tmp->tm_mon + 1) % 10;
85  d->reg[RS5C313_MON10] = (tmp->tm_mon + 1) / 10;
86  d->reg[RS5C313_YEAR1] = tmp->tm_year % 10;
87  d->reg[RS5C313_YEAR10] = (tmp->tm_year / 10) % 10;
88 }
89 
90 
91 DEVICE_ACCESS(rs5c313)
92 {
93  struct rs5c313_data *d = (struct rs5c313_data *) extra;
94  uint64_t idata = 0, odata = 0;
95 
96  rs5c313_update_time(d);
97 
98  /* Generic register read/write: */
99  if (writeflag == MEM_WRITE) {
100  idata = memory_readmax64(cpu, data, len);
101  d->reg[relative_addr] = idata & 0x0f;
102  } else {
103  odata = d->reg[relative_addr] & 0x0f;
104  memory_writemax64(cpu, data, len, odata);
105  }
106 
107  return 1;
108 }
109 
110 
111 DEVINIT(rs5c313)
112 {
113  struct rs5c313_data *d;
114 
115  CHECK_ALLOCATION(d = (struct rs5c313_data *) malloc(sizeof(struct rs5c313_data)));
116  memset(d, 0, sizeof(struct rs5c313_data));
117 
118  /* Default values: */
119  d->reg[RS5C313_CTRL] = CTRL_24H;
120 
123  dev_rs5c313_access, (void *)d, DM_DEFAULT, NULL);
124 
125  return 1;
126 }
127 
#define RS5C313_WDAY
Definition: rs5c313reg.h:46
uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
Definition: memory.cc:55
#define DM_DEFAULT
Definition: memory.h:130
char * name
Definition: device.h:43
struct memory * memory
Definition: machine.h:126
#define RS5C313_CTRL
Definition: rs5c313reg.h:54
#define RS5C313_HOUR1
Definition: rs5c313reg.h:44
uint8_t reg[DEV_RS5C313_LENGTH]
Definition: dev_rs5c313.cc:55
#define CHECK_ALLOCATION(ptr)
Definition: misc.h:239
#define RS5C313_YEAR1
Definition: rs5c313reg.h:52
#define RS5C313_YEAR10
Definition: rs5c313reg.h:53
u_short data
Definition: siireg.h:79
#define MEM_WRITE
Definition: memory.h:117
#define RS5C313_SEC1
Definition: rs5c313reg.h:40
Definition: device.h:40
#define RS5C313_SEC10
Definition: rs5c313reg.h:41
#define RS5C313_MON10
Definition: rs5c313reg.h:51
#define CTRL_24H
Definition: rs5c313reg.h:68
Definition: cpu.h:326
struct machine * machine
Definition: device.h:41
void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len, uint64_t data)
Definition: memory.cc:89
#define DEV_RS5C313_LENGTH
Definition: dev_rs5c313.cc:52
DEVICE_ACCESS(rs5c313)
Definition: dev_rs5c313.cc:91
void memory_device_register(struct memory *mem, const char *, uint64_t baseaddr, uint64_t len, int(*f)(struct cpu *, struct memory *, uint64_t, unsigned char *, size_t, int, void *), void *extra, int flags, unsigned char *dyntrans_data)
Definition: memory.cc:339
#define RS5C313_MIN10
Definition: rs5c313reg.h:43
#define RS5C313_DAY1
Definition: rs5c313reg.h:48
uint64_t addr
Definition: device.h:46
#define RS5C313_DAY10
Definition: rs5c313reg.h:49
DEVINIT(rs5c313)
Definition: dev_rs5c313.cc:111
#define RS5C313_MON1
Definition: rs5c313reg.h:50
#define RS5C313_HOUR10
Definition: rs5c313reg.h:45
#define RS5C313_MIN1
Definition: rs5c313reg.h:42

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