mc146818reg.h Source File

Back to the index.

mc146818reg.h
Go to the documentation of this file.
1 #ifndef MC146818_REG_H
2 #define MC146818_REG_H
3 
4 #ifndef __P
5 #define __P(x) x
6 #endif
7 
8 /* $NetBSD: mc146818reg.h,v 1.2 1997/03/12 06:53:42 cgd Exp $ */
9 
10 /*
11  * Copyright (c) 1995 Carnegie-Mellon University.
12  * All rights reserved.
13  *
14  * Permission to use, copy, modify and distribute this software and
15  * its documentation is hereby granted, provided that both the copyright
16  * notice and this permission notice appear in all copies of the
17  * software, derivative works or modified versions, and any portions
18  * thereof, and that both notices appear in supporting documentation.
19  *
20  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
21  * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
22  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
23  *
24  * Carnegie Mellon requests users of this software to return to
25  *
26  * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
27  * School of Computer Science
28  * Carnegie Mellon University
29  * Pittsburgh PA 15213-3890
30  *
31  * any improvements or extensions that they make and grant Carnegie the
32  * rights to redistribute these changes.
33  */
34 
35 /*
36  * Definitions for the Motorola MC146818A Real Time Clock.
37  * They also apply for the (compatible) Dallas Semicontuctor DS1287A RTC.
38  *
39  * Though there are undoubtedly other (better) sources, this material was
40  * culled from the DEC "KN121 System Module Programmer's Reference
41  * Information."
42  *
43  * The MC146818A has 16 registers. The first 10 contain time-of-year
44  * and alarm data. The rest contain various control and status bits.
45  *
46  * To read or write the registers, one writes the register number to
47  * the RTC's control port, then either reads from or writes the new
48  * data to the RTC's data port. Since the locations of these ports
49  * and the method used to access them can be machine-dependent, the
50  * low-level details of reading and writing the RTC's registers are
51  * handled by machine-specific functions.
52  *
53  * The time-of-year and alarm data can be expressed in either binary
54  * or BCD, and they are selected by a bit in register B.
55  *
56  * The "hour" time-of-year and alarm fields can either be expressed in
57  * AM/PM format, or in 24-hour format. If AM/PM format is chosen, the
58  * hour fields can have the values: 1-12 and 81-92 (the latter being
59  * PM). If the 24-hour format is chosen, they can have the values
60  * 0-24. The hour format is selectable by a bit in register B.
61  * (XXX IS AM/PM MODE DESCRIPTION CORRECT?)
62  *
63  * It is assumed the if systems are going to use BCD (rather than
64  * binary) mode, or AM/PM hour format, they'll do the appropriate
65  * conversions in machine-dependent code. Also, if the clock is
66  * switched between BCD and binary mode, or between AM/PM mode and
67  * 24-hour mode, the time-of-day and alarm registers are NOT
68  * automatically reset; they must be reprogrammed with correct values.
69  */
70 
71 /*
72  * The registers, and the bits within each register.
73  */
74 
75 #define MC_SEC 0x0 /* Time of year: seconds (0-59) */
76 #define MC_ASEC 0x1 /* Alarm: seconds */
77 #define MC_MIN 0x2 /* Time of year: minutes (0-59) */
78 #define MC_AMIN 0x3 /* Alarm: minutes */
79 #define MC_HOUR 0x4 /* Time of year: hour (see above) */
80 #define MC_AHOUR 0x5 /* Alarm: hour */
81 #define MC_DOW 0x6 /* Time of year: day of week (1-7) */
82 #define MC_DOM 0x7 /* Time of year: day of month (1-31) */
83 #define MC_MONTH 0x8 /* Time of year: month (1-12) */
84 #define MC_YEAR 0x9 /* Time of year: year in century (0-99) */
85 
86 #define MC_REGA 0xa /* Control register A */
87 
88 #define MC_REGA_RSMASK 0x0f /* Interrupt rate select mask (see below) */
89 #define MC_REGA_DVMASK 0x70 /* Divisor select mask (see below) */
90 #define MC_REGA_UIP 0x80 /* Update in progress; read only. */
91 
92 #define MC_REGB 0xb /* Control register B */
93 
94 #define MC_REGB_DSE 0x01 /* Daylight Savings Enable */
95 #define MC_REGB_24HR 0x02 /* 24-hour mode (AM/PM mode when clear) */
96 #define MC_REGB_BINARY 0x04 /* Binary mode (BCD mode when clear) */
97 #define MC_REGB_SQWE 0x08 /* Square Wave Enable */
98 #define MC_REGB_UIE 0x10 /* Update End interrupt enable */
99 #define MC_REGB_AIE 0x20 /* Alarm interrupt enable */
100 #define MC_REGB_PIE 0x40 /* Periodic interrupt enable */
101 #define MC_REGB_SET 0x80 /* Allow time to be set; stops updates */
102 
103 #define MC_REGC 0xc /* Control register C */
104 
105 /* MC_REGC_UNUSED 0x0f UNUSED */
106 #define MC_REGC_UF 0x10 /* Update End interrupt flag */
107 #define MC_REGC_AF 0x20 /* Alarm interrupt flag */
108 #define MC_REGC_PF 0x40 /* Periodic interrupt flag */
109 #define MC_REGC_IRQF 0x80 /* Interrupt request pending flag */
110 
111 #define MC_REGD 0xd /* Control register D */
112 
113 /* MC_REGD_UNUSED 0x7f UNUSED */
114 #define MC_REGD_VRT 0x80 /* Valid RAM and Time bit */
115 
116 
117 #define MC_NREGS 0xe /* 14 registers; CMOS follows */
118 #define MC_NTODREGS 0xa /* 10 of those regs are for TOD and alarm */
119 
120 #define MC_NVRAM_START 0xe /* start of NVRAM: offset 14 */
121 #define MC_NVRAM_SIZE 50 /* 50 bytes of NVRAM */
122 
123 /*
124  * Periodic Interrupt Rate Select constants (Control register A)
125  */
126 #define MC_RATE_NONE 0x0 /* No periodic interrupt */
127 #define MC_RATE_1 0x1 /* 256 Hz if MC_BASE_32_KHz, else 32768 Hz */
128 #define MC_RATE_2 0x2 /* 128 Hz if MC_BASE_32_KHz, else 16384 Hz */
129 #define MC_RATE_8192_Hz 0x3 /* 122.070 us period */
130 #define MC_RATE_4096_Hz 0x4 /* 244.141 us period */
131 #define MC_RATE_2048_Hz 0x5 /* 488.281 us period */
132 #define MC_RATE_1024_Hz 0x6 /* 976.562 us period */
133 #define MC_RATE_512_Hz 0x7 /* 1.953125 ms period */
134 #define MC_RATE_256_Hz 0x8 /* 3.90625 ms period */
135 #define MC_RATE_128_Hz 0x9 /* 7.8125 ms period */
136 #define MC_RATE_64_Hz 0xa /* 15.625 ms period */
137 #define MC_RATE_32_Hz 0xb /* 31.25 ms period */
138 #define MC_RATE_16_Hz 0xc /* 62.5 ms period */
139 #define MC_RATE_8_Hz 0xd /* 125 ms period */
140 #define MC_RATE_4_Hz 0xe /* 250 ms period */
141 #define MC_RATE_2_Hz 0xf /* 500 ms period */
142 
143 /*
144  * Time base (divisor select) constants (Control register A)
145  */
146 #define MC_BASE_4_MHz 0x00 /* 4MHz crystal */
147 #define MC_BASE_1_MHz 0x10 /* 1MHz crystal */
148 #define MC_BASE_32_KHz 0x20 /* 32KHz crystal */
149 #define MC_BASE_NONE 0x60 /* actually, both of these reset */
150 #define MC_BASE_RESET 0x70
151 
152 
153 /*
154  * RTC register/NVRAM read and write functions -- machine-dependent.
155  * Appropriately manipulate RTC registers to get/put data values.
156  */
157 u_int mc146818_read __P((void *sc, u_int reg));
158 void mc146818_write __P((void *sc, u_int reg, u_int datum));
159 
160 /*
161  * A collection of TOD/Alarm registers.
162  */
163 typedef u_int mc_todregs[MC_NTODREGS];
164 
165 /*
166  * Get all of the TOD/Alarm registers
167  * Must be called at splhigh(), and with the RTC properly set up.
168  */
169 #define MC146818_GETTOD(sc, regs) \
170  do { \
171  int i; \
172  \
173  /* update in progress; spin loop */ \
174  while (mc146818_read(sc, MC_REGA) & MC_REGA_UIP) \
175  ; \
176  \
177  /* read all of the tod/alarm regs */ \
178  for (i = 0; i < MC_NTODREGS; i++) \
179  (*regs)[i] = mc146818_read(sc, i); \
180  } while (0);
181 
182 /*
183  * Set all of the TOD/Alarm registers
184  * Must be called at splhigh(), and with the RTC properly set up.
185  */
186 #define MC146818_PUTTOD(sc, regs) \
187  do { \
188  int i; \
189  \
190  /* stop updates while setting */ \
191  mc146818_write(sc, MC_REGB, \
192  mc146818_read(sc, MC_REGB) | MC_REGB_SET); \
193  \
194  /* write all of the tod/alarm regs */ \
195  for (i = 0; i < MC_NTODREGS; i++) \
196  mc146818_write(sc, i, (*regs)[i]); \
197  \
198  /* reenable updates */ \
199  mc146818_write(sc, MC_REGB, \
200  mc146818_read(sc, MC_REGB) & ~MC_REGB_SET); \
201  } while (0);
202 
203 #endif
#define reg(x)
u_int mc_todregs[MC_NTODREGS]
Definition: mc146818reg.h:163
#define MC_NTODREGS
Definition: mc146818reg.h:118
#define __P(x)
Definition: mc146818reg.h:5

Generated on Sun Sep 30 2018 16:05:18 for GXemul by doxygen 1.8.13